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Senior ASIC Implementation Technical Lead
4 weeks ago
We are seeking a highly skilled Senior ASIC Implementation Technical Lead to join our team in San Jose, CA. As a key member of our Silicon One development organization, you will be responsible for leading the design and implementation of Design-for-Test (DFT) architecture for our next-generation networking chips.
Key Responsibilities- Develop and implement comprehensive DFT architectures that support ATE screening, in-system test, debug, and diagnostics needs of the design.
- Work closely with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements early in the design cycle.
- Lead junior engineers to deliver expected implementations on schedules and drive the DFT and quality process through the entire Implementation flow and post silicon validation phases.
- Bachelor's or Master's Degree in Electrical or Computer Engineering required with at least 8 years of experience.
- Prior experience with the latest innovative trends in DFT, test, and silicon engineering.
- Prior experience with scripting languages, Jtag protocols, Scan and BIST architectures, including memory BIST and boundary scan.
Cisco is a leader in the networking industry, and we are committed to innovation and excellence. As a member of our team, you will have the opportunity to work on cutting-edge projects and collaborate with talented engineers from around the world.
