Digital Verification Expert for High-Speed Memory Solutions
4 days ago
We are seeking a skilled Digital Verification Engineer to join our team at Advanced Micro Devices, Inc. in San Jose, CA.
Job Overview
The ideal candidate will have industry or academic experience in verifying complex digital designs with high-quality results. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.
About the Role
This is an exciting opportunity to contribute to the development of high-speed memory controller and PHY/IO IP verification environments using digital simulation and formal-based verification techniques. The successful candidate will help design, develop, and use advanced SystemVerilog and UVM-based testbenches to prove the functional correctness of DDR, LPDDR, RLDRAM, QDR, HBM Memory Controllers, PHY/IO, and Network On-Chip (NOC) IPs, Subsystem, and SOC designs.
Responsibilities
- Plan and execute verification of complex digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
- Create and enhance constrained-random and/or directed verification environments using System Verilog and UVM, or formally verify designs with SVA and industry-leading formal tools.
- Identify and write all types of coverage measures for stimulus quality measurements.
- Debug tests with design engineers to deliver functionally correct design blocks.
- Closure of coverage measures to identify verification holes and show progress towards tape-out.
Requirements
- Proficiency in System Verilog and UVM.
- Proficiency in C, Perl, Python, and/or other scripting language.
- Prior experience with AXI Protocol, NoC architecture, or DDR Protocol is a plus.
- A strong team player with good communication skills and one who is capable of working independently with an eye towards improving overall product quality.
- Understanding of state-of-the-art digital design and verification techniques, including simulation-based verification flow, assertion, and metric-driven verification.
- Familiarity with verification management tools and understanding of database management particularly as it pertains to regression management.
- Prior use of simulation tools/debug environments such as Synopsys VCS, Synopsys VCS-XA, or Cadence IES is a strong plus.
- Basic understanding of formal property checking, gate-level simulation, power verification using UPF, reset verification, and/or contention checking is a plus.
Benefits
Your base pay is estimated to be around $120,000 per year, depending on your qualifications, experience, and location. You may also be eligible for incentives such as an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock and purchase them at a discounted rate through our Employee Stock Purchase Plan. You'll also receive competitive benefits that make AMD an attractive place to work.
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