Senior CAD Design Engineer

3 weeks ago


Beaverton, Oregon, United States Apple Full time

Job Summary:

CAD Engineer positions are now available at Apple, focusing on the design and development of next-generation processors and system-on-chip (SoC) technologies. As part of our Silicon Technologies group, you will work on architecting, developing, and maintaining physical design verification (PDV) flows for various technology nodes and tool sets.

Key Responsibilities:

  • Develop and improve physical verification flow and methodology
  • Coordinate the effort of validating flows, improving for custom checks and data generation
  • Work with design and PD teams to facilitate the chip design process
  • Code custom PDV rule decks, including Electrical rule checks (ERC) and Programmable ERCs

Requirements:

  • Previous industry experience in Silicon chip design flows
  • Tapeout support and IP/SOC level PDV debug experience in various technology nodes
  • Scripting skills in programming languages such as Python, Perl, Tcl, Shell, Makefile, or C
  • Experience with flow automation and development in advanced nodes
  • Minimum requirement of BS and 10+ years of relevant industry experience

Preferred Qualifications:

  • Knowledge in Calibre/ICV runset coding for DRC/LVS/ERC/MFILL
  • Rule coding in PERC is a plus
  • Knowledge of parasitic extraction, SKILL coding, and PnR tools is a plus

About Apple:

Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.

Learn more about your EEO rights as an applicant and Apple's commitment to diversity, equity, and inclusion.



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