SoC Physical Design Verification Engineer

4 weeks ago


Beaverton, Oregon, United States Apple Full time
Job Summary

As a SoC Physical Design Verification Engineer at Apple, you will play a critical role in ensuring the quality and reliability of our next-generation, high-performance processors. You will be responsible for performing various types of physical verification checks, including LVS, DRC, ANT, and ESD, at the chip and block level. This is a highly visible role that requires strong knowledge of physical verification flows and methodology, as well as experience with industry-standard tools such as Mentor Calibre and Synopsys ICV.

Key Responsibilities

- Collaborate with the CAD/Technology teams for flow bring up and validation
- Work directly with the implementation team during the entire chip design cycle to drive signoff closure for tapeout
- Lead schedules and support cross-functional engineering efforts

Requirements

- BS in Electrical/Electronics/Computer Engineering or related field
- 3+ years of relevant industry experience
- Strong knowledge of physical verification flows and methodology
- Experience with industry-standard tools used for physical verification

Preferred Qualifications

- MS in Electrical/Electronics/Computer Engineering or related field
- Proficient scripting skills and automation experience
- Layout or floorplan design experience

About Apple

Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.

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