Senior Memory Design Engineer
3 weeks ago
Rivos Custom Circuits team is seeking a highly motivated candidate to develop state-of-the-art custom SRAM memories, register file memories, and compiled memories to improve circuit performance, optimize dynamic and static power, and support silicon bring up.
The ideal candidate will be responsible for designing and delivering custom circuits from scratch, working closely with the microarchitecture team to gather specifications and drive optimal implementation. The role will be at the center of a state-of-the-art circuit design effort, interfacing with all disciplines and having a critical impact on getting products to market quickly.
Key Responsibilities:
Drive design and development of SRAM, register file, custom cells to enable high performance and low power designs
Conduct early sizing estimates and PPA analysis, design entry, and simulations for optimal design sizing
Design equivalence checking using the latest industry standard LEC tools
Work closely with mask designers on custom design implementation, DFM, and yield enhancement features
Deliver high-quality design collateral
Collaborate with the CPU and SoC Physical design teams on floorplanning, placement, timing, and power closure of the custom design
Interact with technology team, participate in developing design and test plans
Collaborate with CAD teams and drive design flow enhancements
Requirements:
The ideal candidate will have 10 years of custom circuit design experience from RTL-GDS for CPU and SoC applications, prior experience and proven success of successfully designing high-performance SRAM memories, register file memories, SRAM compilers, data path designs, and standard cells. Experience designing transistor-level custom circuits in advanced FinFET technology nodes is a must. A solid understanding of device physics, process technology, and circuit design techniques for high performance, low power is required. Experience with advanced process design rules and supervising mask design is also necessary. Knowledge developing automation for compilers and standard cells, post-silicon test and debug experience, and the ability to work well in a team and be productive under aggressive schedules are also required. Excellent problem-solving, written, and verbal communication skills are essential.
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