Senior SOC Validation Engineer
4 weeks ago
XConn Technologies Holdings Inc. is a leading-edge technology company based in Silicon Valley, working on innovative PCIe & CXL Switch solutions for AI/ML and data center applications.
Job Overview:
We are seeking a highly motivated and passionate Senior SOC post-silicon engineer to validate a PCIe/CXL Switch. The successful candidate will be responsible for ensuring the compliance of the product with its specifications.
Key Responsibilities:
- Develop and implement validation plans based on specifications and customer use cases
- Define and establish validation and testing standards and policies
- Perform feature and performance validation, including writing scripts, running regressions, debugging, and analyzing results
- Conduct electrical compliance tests and lab measurements for various interfaces
- Work on high-speed serial I/O interfaces like PCIe Gen1-5 and peripheral interfaces such as SPI, I2C, etc.
- Document and maintain detailed technical documentation related to validation activities and outcomes
- Collaborate with cross-functional teams, including board design, software, architecture, and performance analysis
- Mentor and train junior team members
- Proficient communication, collaboration, and teamwork skills, with the ability to lead, grow, and contribute to diverse and inclusive teams
Requirements:
- Bachelor's or Master's degree or higher in EE, ECE, or CS
- 5-10+ years of experience in SOC/ASIC/FPGA validation
- High-speed serial interface analog building blocks, protocol, specifications, and test methods
- Proficiency in handling high-bandwidth oscilloscopes, BERT, logic analyzers, and understanding of probing
Preferred Qualifications:
- BS/MS/ME in Computer Science, Electrical Engineering, or related field
- Writing Python/C++ code to automate test procedures
- Good software architecture principles and development practices
- Scripting experience in any programming language (C++, Python, PERL, MATLAB) to develop automation scripts is a plus
- Experience in Analog IP Characterization (SerDes, PLL, DDR) is desirable
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