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Cellular SOC Design Verification Engineer
2 months ago
We are seeking a highly skilled Cellular SOC Design Verification Engineer to join our team at Apple. As a key member of our Silicon Engineering Group, you will play a critical role in verifying the design of our cutting-edge cellular systems.
Key Responsibilities- Develop and execute verification plans for complex SOC designs, ensuring thorough coverage of all functional and performance aspects.
- Collaborate with cross-functional teams, including design, architecture, and software development, to integrate and verify the overall SOC design.
- Design and implement reusable verification components, including UVM-based test benches and VIPs, to improve verification efficiency and reduce development time.
- Work closely with DV methodology architects to improve the verification flow and ensure compliance with industry standards.
- Participate in the development of low-power design methodologies and tools to optimize SOC power consumption.
- Advanced knowledge of HVL methodology (UVM/OVM) with recent experience in UVM.
- Proven record of working full ASIC cycle from concept to tape-out to bring-up.
- Experience with large SOC systems, embedded processor cores, and bus architecture (PCIe, Bus Fabric, NOC, AHB, AXI).
- Strong understanding of low-power design, UPF integration, boot-up, power cycling, and HW/FW interaction verification.
- Excellent communication and problem-solving skills, with a strong desire to seek diverse challenges.
- Master's degree or higher in Electrical Engineering, Computer Science, or related field.
- Additional experience in SOC design verification, low-power design, and UVM-based verification.
Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.
