Design Verification Engineer
1 week ago
We are seeking an exceptional Design Verification Engineer to join our team at Apple. As a key member of our hardware engineering group, you will play a critical role in ensuring the quality and functionality of our products.
Key Responsibilities- Develop and implement verification methodologies and test plans for digital IP designs
- Design and develop verification environments, including stimulus, checkers, and assertions
- Write and execute test plans, including design bring-up, DV environment bring-up, and regression testing
- Debug test failures and track and report DV progress using various metrics
- Collaborate with cross-functional teams to ensure seamless integration of hardware and software components
- Deep knowledge of SystemVerilog and UVM
- Experience with verification methodologies and tools, such as simulators and waveform viewers
- Proven track record of building and running automation, coverage collection, and gate-level simulations
- Strong understanding of serial and parallel protocols, such as PCIe, USB, and DDR
- Basic knowledge of formal verification methodology and power-aware verification
- Scripting language skills, such as Python, Perl, or TCL
- BS Degree in Computer Science, Electrical Engineering, or related field
- Experience with Apple's hardware engineering processes and tools
- Knowledge of Apple's design verification methodologies and tools
Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.
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