Senior Electronics Design Engineer
4 weeks ago
We are seeking a highly skilled Senior Electronics Design Engineer to join our team at The Johns Hopkins University Applied Physics Laboratory. As a key member of our Miniature Device Technologies Group, you will be responsible for developing capabilities for sponsor programs with custom hardware needs.
Your primary responsibility will be to conceive, design, and evaluate solutions that may require knowledge of sensors, discrete analog/RF circuit design, power supply design, and interfacing with microcontrollers/FPGAs/custom ASICs. You will pursue new technical concepts in order to improve the SWaP of existing solutions and ensure device reliability through rigorous testing under real-world conditions.
You will also perform as a project manager for moderate-sized tasks, leveraging your experience managing projects on the order of $1M funding per year, or teams of 3 or more staff. Additionally, you will have the opportunity to mentor junior staff and work with a multidisciplinary team of highly-talented electrical, software, mechanical, and materials engineers.
Key Responsibilities- Develop capabilities for sponsor programs with custom hardware needs
- Conceive, design, and evaluate solutions for miniature sensor systems
- Pursue new technical concepts to improve SWaP of existing solutions
- Ensure device reliability through rigorous testing under real-world conditions
- Manage projects on the order of $1M funding per year, or teams of 3 or more staff
- Mentor junior staff
- BS in engineering or other related discipline
- 6+ years of experience specifically designing and testing custom hardware to include RF ASIC technology, with at least 4 years of experience with RF and/or high-speed digital design
- Skilled at using ASIC design tools such as Cadence
- Working knowledge of laboratory test equipment such as power supplies, oscilloscopes, multimeters, spectrum analyzers, waveform generators, and vector network analyzers
- Experience managing projects on the order of $1M funding per year, or teams of 3 or more staff
- Demonstrated experience mentoring junior staff
- Ability to obtain a TS/SCI security clearance
- MS or beyond in engineering, physics, or other related discipline
- Extensive knowledge in ASIC technology such as material selection, etc.
- Background in microelectronics integration such as chip-on-board, chip-scale packaging, chip depackaging, and wirebonding
- Experience with 3D CAD tools suitable for concept mockups or component modeling
- Software development skills suitable for developing automation tools, test interfaces, etc.
- Comfortable around rework tools such as a soldering iron, hot air pencil, or IR rework station
The Johns Hopkins University Applied Physics Laboratory is an Equal Opportunity/Affirmative Action employer. All qualified applicants will receive consideration for employment without regard to race, creed, color, religion, sex, gender identity or expression, sexual orientation, national origin, age, physical or mental disability, genetic information, veteran status, occupation, marital or familial status, political opinion, personal appearance, or any other characteristic protected by applicable law.
We are committed to promoting an innovative environment that embraces diversity, encourages creativity, and supports inclusion of new ideas. In doing so, we are committed to providing reasonable accommodation to individuals of all abilities, including those with disabilities. If you require a reasonable accommodation to participate in any part of the hiring process, please contact us.
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