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Design Verification Engineer

2 months ago

Austin, Texas, United States Apple Full time
About the Role

We are seeking an experienced Design Verification Engineer to join our team at Apple. As a key member of our design verification group, you will play a critical role in ensuring the quality and functionality of our Analog/Digital mixed-signal designs.

Key Responsibilities
  • Develop and implement verification methodologies and test plans for Analog/Digital mixed-signal designs
  • Design and develop verification environments, including stimulus and checkers, to ensure comprehensive coverage of design functionality
  • Collaborate with cross-functional teams to develop and execute verification plans, including design bring-up, DV environment bring-up, and regression testing
  • Develop and maintain detailed test and coverage plans based on micro-architecture and IP requirements
  • Track and report DV progress using various metrics, including bugs and coverage
Requirements
  • Advanced knowledge of SystemVerilog and UVM
  • Experience developing scalable and portable test-benches
  • Experience with verification methodologies and tools, including simulators, waveform viewers, build/run automation, coverage collection, and gate-level simulations
  • Experience with serial protocols, such as PCIe or USB
  • Experience with IP verification methodologies
  • Deep knowledge of IP developments, including PHYs and PLLs
  • Excellent knowledge of one of the scripting languages: Python, Perl, or TCL
  • Proven knowledge of formal verification methodologies
Education and Experience

BS degree in a technical discipline with a minimum of 10 years of relevant experience. Apple is an equal opportunity employer committed to inclusion and diversity.