Senior Design Verification Engineer
2 weeks ago
Design Verification Engineer
We are seeking a highly skilled Design Verification Engineer to join our team at Avanciers. As a key member of our engineering team, you will be responsible for designing and developing verification solutions for complex digital systems.
Key Responsibilities:
- Develop and implement verification plans and strategies for digital systems
- Design and develop testbenches using SystemVerilog and UVM
- Integrate and develop C tests and APIs for software build flow
- Develop and debug tests for functionality, power, performance, error, and connectivity
- Set up and debug continuous integration and regression testing for simulation at RTL and Gate Level Netlist
- Develop and maintain Unified Power Format (UPF) power aware simulation/emulation
- Create and maintain XProp simulation/regression TestBench
- Collect and close coverage
- Document tests, testbench, use-cases, exclusions, and status
About Avanciers:
Avanciers is a leading provider of engineering services and solutions. We are committed to delivering high-quality solutions that meet the needs of our clients.
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