Senior RTL Verification Engineer
4 weeks ago
Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
We are seeking a skilled RTL Verification Engineer to join our team of premier engineers. As a key member of our design team, you will work with state-of-the-art technologies to develop advanced DRAM and DRAM IPs.
Your primary responsibility will be to evaluate full chip or block level functionality and provide solutions to help deliver functionally correct design. You will work closely with our global design and verification teams to contribute to the success of our design projects.
Responsibilities:
- Develop test plans, test benches, and verification infrastructure for verifying DRAM IP across multiple products
- Build a verification plan, incorporating directed and random patterns that cover all features of a memory IP
- Define, develop, and automate flows and methodologies to efficiently build, deploy, and verify RTL IPs
- Build verification components using UVM methodology driving coverage-based verification closure
- Debug simulation failures to determine the root cause; work with RTL engineers to resolve design issues
- Using advanced verification languages and techniques to build a cutting-edge verification platform
- Participating in creating full chip behavior models that are distributed to Micron's worldwide external customers
- Performing verification processes with modeling and simulation using industry-standard simulators
- Driving innovation into the future memory generations within a dynamic work environment
Requirements:
- Fluency in verification languages (System Verilog) and methodologies (UVM)
- Proficient in IP-level ASIC verification and debugging RTL code using simulation tools
- Experience developing UVM block testbenches to RTL IP verification, and developing re-usable sequences and coverage monitors
- Experience with SV assertion development and use of SV assertions for functional coverage
- Experience writing directed tests and constrained pseudo-random tests
- Solid understanding of object-oriented design
- Ability to abstract complex technical details into an easy-to-understand interface
- Good debugging and problem-solving skills
- Experience using scripting languages to automate tasks
- Experience defining coverage strategies and writing coverage models
- Must possess good communication skills and ability to work well in a team
- Previous work experience in ASIC or memory verification
- Good understanding of CMOS circuit design
Education:
- Master's degree in Electrical Engineering (or equivalent) with 5+ years demonstrated ability or a Bachelor's degree with 7+ years of experience in pre-silicon verification (UVM, SystemVerilog), System-On-Chip design/implementation flow, and design automation
Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity, or any other factor protected by applicable federal, state, or local laws.
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