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Senior FPGA ASIC Design Engineer

2 months ago

Redmond, Washington, United States SpaceX Full time
Job Title: Senior FPGA ASIC Design Engineer

At SpaceX, we're pushing the boundaries of innovation and technology to make humanity a multi-planetary species. As a Senior FPGA ASIC Design Engineer, you'll play a critical role in developing the cutting-edge technologies that will enable us to achieve this goal.

Responsibilities:
  • Design and implement ASICs, SoCs, and FPGAs for multiple products, from specification to validation.
  • Participate in all phases of ASIC/FPGA design flow, including synthesis, place and route, and timing closure.
  • Collaborate with backend teams to address layout and timing issues for ASICs.
  • Bring up and validate ASICs and FPGAs in the lab.
  • Develop and debug systems.
Requirements:
  • Bachelor of Science degree in engineering or math.
  • 10+ years of work experience.
  • Previous experience in computer or communication chip architecture.
Preferred Skills and Experience:
  • Masters degree in engineering or math.
  • ASIC/FPGA/SoC system integration experience.
  • Strong silicon/ASIC design experience.
  • Experience with Verilog and System Verilog.
  • Experience with latest simulation and verification methodologies (OVM, UVM).
  • Experience with EDA tools such as HDL Synthesis (Synopsys DC), HDL simulators (VCS, Questa, IES), HDL Lint tools (Spyglass), FPGA tools (Xilinx Vivado, Altera Quartus II).
Additional Requirements:
  • Must be available to work extended hours and weekends as needed.
  • ITAR requirements: must be a U.S. citizen, lawful permanent resident of the U.S., protected individual as defined by 8 U.S.C. 1324b(a)(3), or eligible to obtain the required authorizations from the U.S. Department of State.

SpaceX is an Equal Opportunity Employer and welcomes applications from diverse candidates.