Digital Design Engineer

4 days ago


Redmond, Washington, United States Intelliswift Software Full time
Job Title: Field-Programmable Gate Arrays Engineer

We are seeking a highly skilled Field-Programmable Gate Arrays (FPGA) Engineer to join our team at Intelliswift Software. As an FPGA Engineer, you will be responsible for designing, developing, and verifying complex digital systems using FPGAs.

Key Responsibilities:
  • Contribute to the development of efficient μArchitectures and contribute to ASIC digital μArchitecture, design, and verification
  • Integrate IPs and understand Design for Verification concepts
  • Drive the top-level μArchitecture definition and develop the necessary RTL
  • Drive the chip-level integration, verification plan development, and verification
  • Supervise the RTL-to-GDS flow and assist with synthesis and timing closure
  • Support the test program development, chip validation, and chip life until production maturity
  • Work with FPGA engineers to perform early prototyping
  • Support hand-off and integration of blocks into larger SOC environments
  • Assist with Algorithm analysis, verification, and improvement
  • Contribute to ASIC digital architecture, design, and verification
Requirements:
  • 5+ years of FPGA design experience using Verilog, SystemVerilog
  • 5+ years of experience in AMD/Xilinx FPGA design (Kintex/Virtex UltraScale+ desired, 7-series minimum)
  • 4+ years of experience as a Digital Design Engineer and/or a Chip Lead
  • Experience in RTL coding, synthesis, and/or SoC Integration
  • Experience in digital design μArchitecture
  • BS Electrical Engineering/Computer Science or equivalent experience
  • Experience with UPF based simulation flow
  • System Verilog OVM/UVM experience
  • Tcl and Python (or similar) scripting experience
  • Experience in SoC integration and ASIC architecture
Preferred Qualifications:
  • Experience in DFT/Testability requirement and test program definition
  • Experience using High Speed interfaces like PCIe, USB, MIPI
  • FPGA design
  • Tensilica DSP, TIE, CNN, fixed point, floating point, python
  • Experience with Power Aware GLS flow
  • MSEE/CS or equivalent experience
Education:
  • Must Have: Bachelor degree in Electrical/Computer Engineering or Computer Science
  • Master's Degree preferred but not required


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