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Performance Model Integration Specialist
2 months ago
Summary:
Role Overview:
At Apple, innovation is at the heart of everything we do. We are looking for individuals who are passionate about developing sophisticated solutions to intricate challenges. Our Platform Architecture team plays a crucial role in merging hardware and software into a cohesive system.
As a member of this team, you will collaborate with engineers across various departments to design and implement advanced prototype systems that enhance our acclaimed hardware and software architecture.
This diverse role encompasses analysis from low-level software optimization for custom CPU pipelines to the performance of SOC-level cache and memory subsystems.
Your contributions will involve creating tools that ensure our products operate at peak performance, instilling confidence in millions of users worldwide.
The Platform Architecture team is on the lookout for a performance model integration engineer who will pioneer technologies that expedite the development and validation of silicon.
You will engage with leading silicon engineering and firmware development teams on next-generation chips that will reach a global audience.
Key Responsibilities:- Develop and sustain RTL-based systems performance models, integrating CPU IP and peripheral components.
- Validate, manage, and deliver models to cross-functional internal stakeholders.
- Facilitate clear communication with engineers from various disciplines, including software, architecture, verification, and validation.
- Troubleshoot functionality and performance of extensive IP-based systems using simulation.
- Work autonomously and manage deliverables across different teams.
- Exhibit excellent communication, analytical, and documentation skills.
Travel Requirements:
Occasional travel to development teams may be necessary.
- Proficient HDL programming skills in Verilog/SystemVerilog.
- Familiarity with SystemVerilog and DPI (C/C++) is preferred.
- Understanding of Computer Architecture principles.
- Strong debugging capabilities in both software and hardware environments.
- Experience in developing HDL-based testbenches is essential (UVM experience is not required).
- Preferred experience in creating HDL-based testbenches for Emulation/Acceleration.
- Knowledge of bus functional models and Verification IP is advantageous.
- Experience with C/C++ testbenches is beneficial.
- Familiarity with CPU, IP, SoC performance analysis, and latency characterization is a plus.
- X86/ARM Assembly experience is an advantage.
- Familiarity with Xcelium/Modelsim/Synopsis VCS is a plus.
- Experience with waveform debugging is desirable.
- Scripting and coding skills in Python are a plus.
- Excellent communication skills and prior customer support experience are advantageous.
Education & Experience:
A BS degree with a minimum of 3 years of relevant experience is required.
At Apple, base pay is one component of our comprehensive compensation package, determined within a specified range.
The base pay range for this role is between $135,400 and $250,600, influenced by your skills, qualifications, experience, and location.
Employees also have the opportunity to participate in Apple's discretionary employee stock programs, including restricted stock unit awards and discounted stock purchases through the Employee Stock Purchase Plan.
Additional Benefits:
- Comprehensive medical and dental coverage.
- Retirement benefits.
- A variety of discounted products and free services.
- Reimbursement for certain educational expenses related to career advancement at Apple.
Note:
Apple’s benefits, compensation, and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program. Apple is an equal opportunity employer committed to inclusion and diversity, ensuring equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.