Senior Etch Process Engineer

3 hours ago


Hillsboro OR USA, United States Jireh Semiconductor Full time
Job Title: Senior Etch Process Engineer

We are seeking an experienced Senior Etch Process Engineer to join our team at Jireh Semiconductor in Hillsboro, OR. As a key member of our engineering team, you will be responsible for ensuring robust manufacturing processes are established and maintained.

Key Responsibilities:
  • Develop and optimize dry etch processes for oxide and silicon in a 200mm semiconductor fab
  • Implement Statistical Process Control (SPC) and Design of Experiments (DOE) to reduce process variation
  • Investigate and resolve process drift or human error, and implement preventative actions
  • Write specifications for processes and operations, qualification plans, and documentation of scrap and rework
  • Improve the performance of the area in cost and efficiency
Requirements:
  • Master's Degree in Physics, Electrical Engineering, Materials Science, Chemical Engineering, or related field
  • 5+ years of semiconductor Etch experience
  • Hands-on experience with Applied Materials, Lam, and TEL etchers
  • R&D experience in trench etch of silicon, poly, and oxide for Silicon power devices
  • Strong statistical data analysis skills
  • Strong written and verbal communication skills
About Jireh Semiconductor:

Jireh Semiconductor is a wholly owned subsidiary of Alpha and Omega Semiconductor Ltd., and is the in-house wafer fab for AOS. We are dedicated to our mission of Bringing Manufacturing Back to the USA Profitably and believe that ordinary people can achieve the extraordinary.

We offer a comprehensive benefits package, including 401(k) plus company match, Employee Stock Purchase Plan (ESPP), and medical, dental, and vision insurance. We are an equal opportunity employer and prohibit discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.



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