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Senior FPGA Design Verification Engineer
4 weeks ago
Pursue a challenging career in electronic systems development with BAE Systems, where you will design and verify advanced systems for the nation's most sophisticated aircraft.
As a Senior FPGA Design Verification Engineer, you will lead teams, mentor junior engineers, and contribute to the evolution of our verification processes and methodologies.
Key responsibilities include:
- Planning, architecting, and developing verification environments using SystemVerilog/UVM and/or VHDL;
- Developing constrained-random, metric-driven test plans and strategies to verify FPGAs performing signal processing and control functions in Electronic Warfare systems;
- Collecting and analyzing coverage metrics to improve the effectiveness of testcases;
- Enhancing leadership skills while leading small to medium sized DV teams;
- Creating reusable Verification IP to be shared across the organization;
- Driving changes to our process and methodologies;
- Mentoring junior engineers across multiple U.S. locations.
BAE Systems offers competitive pay, benefits, and important work-life balance initiatives, including every other Friday Off, Flextime, and Telecommuting.
We believe in a culture of recognition for the extraordinary contributions of our skilled employees.
Due to the need for consistent, in-person collaboration and/or the requirement to perform all work onsite, this role will be performed full-time on site.
Required Education, Experience, & Skills
- Bachelor's Degree and 6 to 10 years work experience (or equivalent experience)
- Experience planning, architecting, developing, and using constrained random, self-checking testbenches in SystemVerilog/UVM, OVM, and/or VHDL
- Experience with FPGA/ASIC design and verification tools (Mentor Questa or Cadence)
- Proven track record of managing and executing to schedules, and driving tasks to closure
- Strong communication and documentation skills
- Experience developing and implementing test plans
- Ability to work effectively in a multi-site or borderless environment
Preferred Education, Experience, & Skills
The following skills/experience are preferred, but not required:
- Perl/Python
- C /Java
- Git/Jira/BitBucket
- Digital Signal Processing
- Matlab/Simulink
- Working knowledge of VHDL
- FPGA Design Experience
- Experience creating reusable Verification IP
- Experience leading small to medium teams with accountability for cost, schedule, and quality
- Experience driving process
- Demonstrated mentoring skills
Pay Information
Full-Time Salary Range:
$208890
Please note:
This range is based on our market pay structures.
However, individual salaries are determined by a variety of factors including, but not limited to:
business considerations, local market conditions, and internal equity, as well as candidate qualifications, such as skills, education, and experience.
Employee Benefits:
At BAE Systems, we support our employees in all aspects of their life, including their health and financial well-being.
Regular employees scheduled to work 20 hours per week are offered:health, dental, and vision insurance; health savings accounts; a 401(k) savings plan; disability coverage; and life and accident insurance.
We also have an employee assistance program, a legal plan, and other perks including discounts on things like home, auto, and pet insurance.
Our leave programs include paid time off, paid holidays, as well as other types of leave, including paid parental, military, bereavement, and any applicable federal and state sick leave.
Employees may participate in the company recognition program to receive monetary or non-monetary recognition awards. Other incentives may be available based on position level and/or job specifics.Design Verification Engineer - FPGA - (Sign-on Bonus)
103333BR
EEO Career Site Equal Opportunity Employer. Minorities. females. veterans. individuals with disabilities. sexual orientation. gender identity. gender expression
BAE Systems