RTL Design Engineer
4 weeks ago
Job Title: RTL Design Engineer - Senior
Work Location: Santa Clara, CA 95054
Duration: 12 Months
Work Type: Contract
Job Type: Onsite
Pay Rate: $78.00-78.00/Hourly/W2
Overview:
TekWissen Group is a workforce management provider throughout the USA and many other countries in the world. This Client is an American multinational semiconductor company based in Santa Clara, California, that develops computer processors and related technologies for business and consumer markets. global company that specializes in manufacturing semiconductor devices used in computer processing. The company also produces flash memories, graphics processors, motherboard chip sets, and a variety of components used in consumer electronics goods.
JOB Description:
- Responsible for RTL design using Verilog HDL for implementation and debug. Read and comprehend System on Chip level architectural specification. Write microarchitecture specification for new and modified functions. Responsible for linting and simulation of design. Work with synthesis and backend teams for physical implementation. EDUCATION: Bachelor's or Master's in Computer Engineering
KEY RESPONSIBILITIES:
- Perform RTL design of digital components in Verilog/systemverilog.
- Analyze/fix Lint and CDC errors of the components.
- Guarantee quality/timely deliverables meeting projects schedule.
- Help to improve/automate design process.
PREFERRED EXPERIENCE:
- Knowledge of RISK-V processor integration Express
- Multi-clock domain designs.
- Design constraints for synthesis and static timing analysis.
- Knowledge of AXI/AMBA protocol
- Knowledge of front-end RTL design tools and methodologies.
- Knowledge of scripting languages like Perl, tcl or cshell
TekWissen Group is an equal opportunity employer supporting workforce diversity.
by Jobble
-
RTL Design Engineer
2 months ago
Santa Clara, United States Protingent Full timePosition Title: RTL Design Engineer Position Description: Protingent Staffing has an exciting contract opportunity for RTL Design Engineer with our client located in San Jose, CA.Project Description: Responsible for RTL design using Verilog HDL for implementation and debug. Read and comprehend System on Chip level architectural specification. Write...
-
RTL Design Engineer
3 weeks ago
Santa Clara, United States LanceSoft Full timeKEY RESPONSIBILITIES: • Microarchitecture development of IP subsystems • Perform RTL design of digital components. • Work with functional verification team to meet coverage and quality standards. • Analyze/fix Lint and CDC errors of the components. • Guarantee quality/timely deliverables meeting project’s schedule. • Help to improve/automate...
-
RTL Design Engineer
4 weeks ago
Santa Clara, United States SGS Consulting Full timeJOB DESCRIPTION: JOB DUTIES: Responsible for RTL design using Verilog HDL for implementation and debug. Read and comprehend System on Chip level architectural specification. Write microarchitecture specification for new and modified functions. Responsible for linting and simulation of design. Work with synthesis and backend teams for physical...
-
RTL Design Engineer
1 month ago
Santa Clara, United States LanceSoft, Inc. Full timeKEY RESPONSIBILITIES: • Microarchitecture development of IP subsystems• Perform RTL design of digital components.• Work with functional verification team to meet coverage and quality standards.• Analyze/fix Lint and CDC errors of the components.• Guarantee quality/timely deliverables meeting project’s schedule.• Help to improve/automate design...
-
RTL Design Engineer
1 month ago
Santa Clara, United States LanceSoft, Inc. Full timeKEY RESPONSIBILITIES: • Microarchitecture development of IP subsystems• Perform RTL design of digital components.• Work with functional verification team to meet coverage and quality standards.• Analyze/fix Lint and CDC errors of the components.• Guarantee quality/timely deliverables meeting project’s schedule.• Help to improve/automate design...
-
RTL Design Engineer
1 week ago
Santa Clara, United States LanceSoft Full timeKEY RESPONSIBILITIES: Microarchitecture development of IP subsystems Perform RTL design of digital components. Work with functional verification team to meet coverage and quality standards. Analyze/fix Lint and CDC errors of the components. Guarantee quality/timely deliverables meeting project's schedule. Help to improve/automate design process. Support...
-
RTL Design Engineer
1 month ago
Santa Clara, United States LanceSoft, Inc. Full timeKEY RESPONSIBILITIES: • Microarchitecture development of IP subsystems• Perform RTL design of digital components.• Work with functional verification team to meet coverage and quality standards.• Analyze/fix Lint and CDC errors of the components.• Guarantee quality/timely deliverables meeting project’s schedule.• Help to improve/automate design...
-
RTL Design Engineer
1 week ago
Santa Clara, United States LanceSoft, Inc. Full timeKEY RESPONSIBILITIES: • Microarchitecture development of IP subsystems• Perform RTL design of digital components.• Work with functional verification team to meet coverage and quality standards.• Analyze/fix Lint and CDC errors of the components.• Guarantee quality/timely deliverables meeting project’s schedule.• Help to improve/automate design...
-
Sr. RTL Design Engineer
4 weeks ago
Santa Clara, United States Infobahn Softworld Inc. Full timeLocation: San Jose, CA - Hybrid (at least 3 days a week) KEY RESPONSIBILITIES: Microarchitecture development of IP subsystems Perform RTL design of digital components. Work with functional verification team to meet coverage and quality standards. Analyze/fix Lint and CDC errors of the components. Guarantee quality/timely deliverables meeting project's...
-
RTL Design Engineer
4 weeks ago
Santa Clara, United States SGS Consulting Full timeTHE DUTIES:The work will expose the designer to a number of IP including ARM cores, Ethernet, DDR, DMA, PCIE, SATA and client s internal IPs.Successful candidates will be responsible for leading, and participating in, the design of leading edge SoCs in advanced digital CMOS processes.Our RTL Design Engineers are expected contribute in all aspects of SoC...
-
Senior RTL Design Engineer
1 month ago
Santa Clara, United States Protingent Full timeDescription:• Microarchitecture development of IP subsystems• Perform RTL design of digital components.• Work with functional verification team to meet coverage and quality standards.• Analyze/fix Lint and CDC errors of the components.• Guarantee quality/timely deliverables meeting project’s schedule.• Help to improve/automate design...
-
ASIC/RTL Design Engineer
2 months ago
Santa Clara, CA, United States Saicon Consultants, Inc. Full timeASIC/RTL Design Engineer Successful candidates will be responsible for leading, and participating in, the design of leading edge SoCs in advanced digital CMOS processes. Our RTL Design Engineers are expected contribute in all aspects of SoC design including: Chip definition, Architecture development and modeling, Development of micro-architectural...
-
RTL Design Engineer
2 weeks ago
Santa Clara, United States ObjectWin Technology Full timeRTL Design Engineer - Specialized (US) Location: San Jose, CA 95124 Onsite 12 Months Contract Job Description: Location: Onsite San Jose, CA JOB DUTIES : Responsible for RTL design using Verilog HDL for implementation and debug. Read and comprehend System on Chip level architectural specification. Write microarchitecture specification for new and modified...
-
RTL Design Engineer
4 weeks ago
Santa Clara, United States ObjectWin Technology Full timeRTL Design Engineer - Specialized (US) 12 months contract (W2) Location: San Jose, CA 95124. Hybrid (at least 3 days a week onsite) Job Description: Location: San Jose, CA - Hybrid (at least 3 days a week) KEY RESPONSIBILITIES: • Microarchitecture development of IP subsystems • Perform RTL design of digital components. • Work with...
-
RTL Design Engineer
1 month ago
Santa Clara, United States ObjectWin Technology Full timeRTL Design Engineer - Specialized (US) 12 months contract (W2) Location: San Jose, CA 95124. Hybrid (at least 3 days a week onsite)Job Description:Location: San Jose, CA - Hybrid (at least 3 days a week)KEY RESPONSIBILITIES: • Microarchitecture development of IP subsystems • Perform RTL design of digital components. • Work with functional...
-
RTL Design Engineer
1 month ago
Santa Clara, United States ObjectWin Technology Full timeRTL Design Engineer - Specialized (US) 12 months contract (W2) Location: San Jose, CA 95124. Hybrid (at least 3 days a week onsite)Job Description:Location: San Jose, CA - Hybrid (at least 3 days a week)KEY RESPONSIBILITIES: •Microarchitecture development of IP subsystems •Perform RTL design of digital components. •Work with functional verification...
-
RTL Design Engineer
2 months ago
Santa Clara, United States ObjectWin Technology Full timeRTL Design Engineer - Specialized (US) Location: San Jose, CA 95124 Onsite 12 Months ContractJob Description: Location: Onsite San Jose, CA JOB DUTIES: Responsible for RTL design using Verilog HDL for implementation and debug. Read and comprehend System on Chip level architectural specification. Write microarchitecture specification for new and modified...
-
Senior RTL Design Engineer
3 weeks ago
Santa Clara, United States Cynet Systems Full timeJob Description: Pay Range $ 70.86hr - $75.86hr Responsibilities: Perform RTL design of digital components in Verilog/systemverilog. nalyze/fix Lint and CDC errors of the components. Guarantee quality/timely deliverables meeting project's schedule. Help to improve/automate the design process. Preferred Experience: Knowledge of RISK-V...
-
ASIC/RTL Design Engineer
2 weeks ago
Santa Clara, CA, United States Saicon Consultants, Inc. Full timeASIC/RTL Design Engineer Location:Santa Clara, CA Posted On: 03/15/2024 Requirement Code: 67337 Requirement Detail JOB DUTIES: The work will expose the designer to a number of IP including ARM cores, Ethernet, DDR, DMA, PCIE, SATA and AMD internal IPs. Successful candidates will be responsible for leading, and participating in, the design of...
-
RTL Design Engineer
2 weeks ago
Santa Clara, United States LanceSoft Full timeLocation: Onsite San Jose, CA JOB DUTIES: Responsible for RTL design using Verilog HDL for implementation and debug. Read and comprehend System on Chip level architectural specification. Write microarchitecture specification for new and modified functions. Responsible for linting and simulation of design. Work with synthesis and backend teams for physical...