RTL Design Engineer

Position Title: RTL Design Engineer Position Description: Protingent Staffing has an exciting contract opportunity for RTL Design Engineer with our client located in San Jose, CA.Project Description: Responsible for RTL design using Verilog HDL for implementation and debug. Read and comprehend System on Chip level architectural specification. Write...

KEY RESPONSIBILITIES: Microarchitecture development of IP subsystems Perform RTL design of digital components. Work with functional verification team to meet coverage and quality standards. Analyze/fix Lint and CDC errors of the components. Guarantee quality/timely deliverables meeting project's schedule. Help to improve/automate design process. Support...

KEY RESPONSIBILITIES: • Microarchitecture development of IP subsystems• Perform RTL design of digital components.• Work with functional verification team to meet coverage and quality standards.• Analyze/fix Lint and CDC errors of the components.• Guarantee quality/timely deliverables meeting project’s schedule.• Help to improve/automate design...

Description:• Microarchitecture development of IP subsystems• Perform RTL design of digital components.• Work with functional verification team to meet coverage and quality standards.• Analyze/fix Lint and CDC errors of the components.• Guarantee quality/timely deliverables meeting project’s schedule.• Help to improve/automate design...

Job Title: RTL Design Engineer - Senior Work Location: Santa Clara, CA 95054 Duration: 12 Months Work Type: Contract Job Type: Onsite Pay Rate: $78.00-78.00/Hourly/W2Overview: TekWissen Group is a workforce management provider throughout the USA and many other countries in the world. This Client is an American multinational semiconductor company based in...

Job Title: RTL Design Engineer - Senior Work Location: Santa Clara, CA 95054 Duration: 12 Months Work Type: Contract Job Type: Onsite Pay Rate: $78.00-78.00/Hourly/W2Overview: TekWissen Group is a workforce management provider throughout the USA and many other countries in the world. This Client is an American multinational semiconductor company based in...

RTL Design Engineer - Specialized (US) 12 months contract (W2) Location: San Jose, CA 95124. Hybrid (at least 3 days a week onsite)Job Description:Location: San Jose, CA - Hybrid (at least 3 days a week)KEY RESPONSIBILITIES: •Microarchitecture development of IP subsystems •Perform RTL design of digital components. •Work with functional verification...

RTL Design Engineer - Specialized (US) 12 months contract (W2) Location: San Jose, CA 95124. Hybrid (at least 3 days a week onsite)Job Description:Location: San Jose, CA - Hybrid (at least 3 days a week)KEY RESPONSIBILITIES: • Microarchitecture development of IP subsystems • Perform RTL design of digital components. • Work with functional...

RTL Design Engineer - Specialized (US) Location: San Jose, CA 95124 Onsite 12 Months ContractJob Description: Location: Onsite San Jose, CA JOB DUTIES: Responsible for RTL design using Verilog HDL for implementation and debug. Read and comprehend System on Chip level architectural specification. Write microarchitecture specification for new and modified...

Location: Onsite San Jose, CA JOB DUTIES: Responsible for RTL design using Verilog HDL for implementation and debug. Read and comprehend System on Chip level architectural specification. Write microarchitecture specification for new and modified functions. Responsible for linting and simulation of design. Work with synthesis and backend teams for physical...

Location: Onsite San Jose, CA JOB DUTIES: Responsible for RTL design using Verilog HDL for implementation and debug. Read and comprehend System on Chip level architectural specification. Write microarchitecture specification for new and modified functions. Responsible for linting and simulation of design. Work with synthesis and backend teams for physical...

Location: Onsite San Jose, CA JOB DUTIES: Responsible for RTL design using Verilog HDL for implementation and debug. Read and comprehend System on Chip level architectural specification. Write microarchitecture specification for new and modified functions. Responsible for linting and simulation of design. Work with synthesis and backend teams for physical...

Location: Onsite San Jose, CA JOB DUTIES: Responsible for RTL design using Verilog HDL for implementation and debug. Read and comprehend System on Chip level architectural specification. Write microarchitecture specification for new and modified functions. Responsible for linting and simulation of design. Work with synthesis and backend teams for physical...

KEY RESPONSIBILITIES: • Microarchitecture development of IP subsystems • Perform RTL design of digital components. • Work with functional verification team to meet coverage and quality standards. • Analyze/fix Lint and CDC errors of the components. • Guarantee quality/timely deliverables meeting project's schedule. • Help to improve/automate...

Location: Onsite San Jose, CA JOB DUTIES: Responsible for RTL design using Verilog HDL for implementation and debug. Read and comprehend System on Chip level architectural specification. Write microarchitecture specification for new and modified functions. Responsible for linting and simulation of design. Work with synthesis and backend teams for physical...

We have an immediate opportunity with one of our direct clients. Please find the job description below and if you are interested, please forward your resume and share below details: Best contact number: Work Authorization: Hourly Payrate expected (W2): Month & Day of birth (MM/DD): Present Location & Zip-code: LinkedIn: Title: RTL Design...

We have an immediate opportunity with one of our direct clients. Please find the job description below and if you are interested, please forward your resume and share below details: Best contact number: Work Authorization: Hourly Payrate expected (W2): Month & Day of birth (MM/DD): Present Location & Zip-code: LinkedIn: Title: RTL...

Job Description & Skill Requirement:5- 10yrs Exp range engineers RequiredPort schematics from the previous projectRun pre-layout simulations and implement ECOs to meet design targetsPrepare and present Pre-Layout Design ReviewGuide layout engineer to implement the layoutRun post-layout simulations and implement ECOs to meet design targetsPrepare and present...

Job Description & Skill Requirement:5- 10yrs Exp range engineers RequiredPort schematics from the previous projectRun pre-layout simulations and implement ECOs to meet design targetsPrepare and present Pre-Layout Design ReviewGuide layout engineer to implement the layoutRun post-layout simulations and implement ECOs to meet design targetsPrepare and present...

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