Silicon Physical Design Engineer III

PRINCIPAL SOC/ ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX were leveraging our experience in building rockets and spacecraft to deploy Starlink, the worlds most advanced broadband internet system. Starlink is the worlds largest s Engineer, Design Engineer, Principal, Design, Physical, Product Engineer, Technology, Business Services

Detailed Job Description Job Title: Core Engineering- Hardware - Silicon Performance Modeling Engineer III Job Description: What are the top non-negotiable skill sets required for this role? • Experience in writing silicon IP reference models using C++ • Understanding SoC and ASIC design flow Duties: • Develop C++ reference models for computer...

Detailed Job Description Job Title: Core Engineering- Hardware - Silicon Performance Modeling Engineer III Job Description: What are the top non-negotiable skill sets required for this role? • Experience in writing silicon IP reference models using C++ • Understanding SoC and ASIC design flow Duties: • Develop C++ reference models for computer...

The Reality Labs team is building products that make it easier for people to connect with the ones they love most. We are a team of world-class experts developing and shipping products at the intersection of silicon, hardware, software, and content. The Reality Labs team seeks a Silicon Validation Engineer. As a Silicon Validation Engineer, you will be part...

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. SR. SOC/ASIC PHYSICAL VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX...

Experience in writing silicon IP reference models using C++ • Understanding SoC and ASIC design flow Duties: • Develop C++ reference models for computer vision and audio IPs • Working with IP architect and RTL DV teams to use the model as golden for design verification Must Have: • 3+ years of experience in C++ and familiarity with SystemC •...

Experience in writing silicon IP reference models using C++• Understanding SoC and ASIC design flowDuties:• Develop C++ reference models for computer vision and audio IPs• Working with IP architect and RTL DV teams to use the model as golden for design verificationMust Have:• 3+ years of experience in C++ and familiarity with SystemC• Ability to...

Experience in writing silicon IP reference models using C++• Understanding SoC and ASIC design flowDuties:• Develop C++ reference models for computer vision and audio IPs• Working with IP architect and RTL DV teams to use the model as golden for design verificationMust Have:• 3+ years of experience in C++ and familiarity with SystemC• Ability to...

Experience in writing silicon IP reference models using C++• Understanding SoC and ASIC design flowDuties:• Develop C++ reference models for computer vision and audio IPs• Working with IP architect and RTL DV teams to use the model as golden for design verificationMust Have:• 3+ years of experience in C++ and familiarity with SystemC• Ability to...

Meta's Reality Labs(RL) focuses on delivering Meta's vision through Augmented Reality (AR). Compute power requirements of Augmented Reality require custom silicon. Meta RL Silicon team is driving the state of the art forward with breakthrough work in computer vision, machine learning, mixed reality, graphics, displays, sensors, and new ways to map the human...

Job Title: PCB Design Engineer III Locations: Sunnyvale, CA - Onsite Duration: 06 Months to start on W2 Job Description: Responsibilities: Manage all aspects of PCB design, work with hardware design engineers and PCB/ Assembly vendors to determine PCB stack-up, apply design constraints, perform component placement, signal routing, and DFM. Create OrCAD...

Job Title: PCB Design Engineer III Locations: Sunnyvale, CA - Onsite Duration: 06 Months to start on W2 Candidates should take the time to read all the elements of this job advert carefully Please make your application promptly. Job Description: Responsibilities: Manage all aspects of PCB design, work with hardware design engineers and PCB/ Assembly...

Job Title: PCB Design Engineer IIILocations: Sunnyvale, CA - OnsiteDuration: 06 Months to start on W2 Job Description:Responsibilities: Manage all aspects of PCB design, work with hardware design engineers and PCB/ Assembly vendors to determine PCB stack-up, apply design constraints, perform component placement, signal routing, and DFM. Create OrCAD...

Job Title: PCB Design Engineer IIILocations: Sunnyvale, CA - OnsiteDuration: 06 Months to start on W2 Job Description:Responsibilities: Manage all aspects of PCB design, work with hardware design engineers and PCB/ Assembly vendors to determine PCB stack-up, apply design constraints, perform component placement, signal routing, and DFM. Create OrCAD...

The ideal candidate will be a consensus-driven leader with management and leadership experience in small to large size organizations, with comprehensive system and silicon development experience, and a proven track record of first-pass success in ASIC and Systems. ASIC Engineering Manager, Design Verification Responsibilities Manage an ASIC design...

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. SR. SOC PHYSICAL DESIGN STA/TIMING ENGINEER (SILICON ENGINEERING) At SpaceX...

Job Description:Deep understanding of pre-Silicon DV functional coverage concepts. Understanding and experience in Assertion coverage and also structural coverageExperience with coverage collection on Emulation platformsExperience / understanding of how performance and event monitors are used in SiliconSkills : Python, C/C++, experience with bare metal OS ,...

Job Description:Deep understanding of pre-Silicon DV functional coverage concepts. Understanding and experience in Assertion coverage and also structural coverageExperience with coverage collection on Emulation platformsExperience / understanding of how performance and event monitors are used in SiliconSkills : Python, C/C++, experience with bare metal OS ,...

Job Description:Deep understanding of pre-Silicon DV functional coverage concepts. Understanding and experience in Assertion coverage and also structural coverageExperience with coverage collection on Emulation platformsExperience / understanding of how performance and event monitors are used in SiliconSkills : Python, C/C++, experience with bare metal OS ,...

Location: Austin, TX or Sunnyvale, CA Maximise your chances of a successful application to this job by ensuring your CV and skills are a good match. Qualification/Experience/Skills Required: 10+ years industry experience, BS EE. Hands-on tape-out experience performing timing and physical verification closure on 5nm FinFET TSMC process or similar/lower...