Design STA Engineer

JOB TITLE: STA Physical Design Engineer LOCATION: San Jose, CA (hybrid 3-4 days onsite) DURATION: 6+ Months PAY RANGE: $80-$110/hr TOP 3 SKILLS: - 8-10+ years' experience in Physical Design and STA - Expert in Synopsys timing analysis tool Primetime or similar tools.  - Experience in timing ecos using Synopsys and other tools. COMPANY: Our client, a...

Physical Design STA EngineerLocation:- San Jose, CA (Hybrid Schedule)Duration:- 6 MonthsPay rate:- $80 - $120/hr W2.Responsibilities of Physical Design STA EngineerPerform static timing analysis (STA) and timing optimization, generate and verifies timing constraints, performs SI/Noise analysis, and fixes timing & noise violations at full chip/block level for...

Physical Design STA EngineerLocation:- San Jose, CA (Hybrid Schedule)Duration:- 6 MonthsPay rate:- $80 - $120/hr W2.Responsibilities of Physical Design STA EngineerPerform static timing analysis (STA) and timing optimization, generate and verifies timing constraints, performs SI/Noise analysis, and fixes timing & noise violations at full chip/block level for...

Physical Design STA EngineerLocation:- San Jose, CA (Hybrid Schedule)Duration:- 6 MonthsPay rate:- $80 - $120/hr W2.Responsibilities of Physical Design STA EngineerPerform static timing analysis (STA) and timing optimization, generate and verifies timing constraints, performs SI/Noise analysis, and fixes timing & noise violations at full chip/block level for...

Hi, This is Himanshu from Xoriant, sharing the below job description for one of our open requirements, please have a look and let me know your valuable feedback along with your updated resume and best time to reach you. Job Position: Physical Design STA EngineerJob Location: San Jose, CA (Hybrid)Job Duration: 6+ Months Contract Job Description: Sr. STA...

Title: Physical Design STA EngineerLocation: San Jose, CA 95134 Duration: 6 Months+ Job Description:Sr. STA Engineer with 15+ years experience for STA position (Physical Design Static Timing Analysis / STA Engineer).Perform static timing analysis (STA) and timing optimization, generate and verifies timing constraints, performs SI/Noise analysis, and fixes...

STA Physical Design Engineer LOCATION : San Jose, CA (hybrid 3 days onsite) DURATION: 6+ Months Description: Perform static timing analysis (STA) and timing optimization, generate and verifies timing constraints, performs SI/Noise analysis, and fixes timing & noise violations at full chip/block level for SoCs. - Strong understanding of digital design...

STA Physical Design Engineer LOCATION: San Jose, CA (hybrid 3 days onsite) DURATION: 6+ Months Description: Perform static timing analysis (STA) and timing optimization, generate and verifies timing constraints, performs SI/Noise analysis, and fixes timing & noise violations at full chip/block level for SoCs. - Strong understanding of digital design...

STA Physical Design Engineer LOCATION: San Jose, CA (hybrid 3 days onsite) DURATION: 6+ Months Description: Perform static timing analysis (STA) and timing optimization, generate and verifies timing constraints, performs SI/Noise analysis, and fixes timing & noise violations at full chip/block level for SoCs. - Strong understanding of digital design...

STA Physical Design EngineerLOCATION: San Jose, CA (hybrid 3 days onsite)DURATION: 6+ MonthsDescription:Perform static timing analysis (STA) and timing optimization, generate and verifies timing constraints, performs SI/Noise analysis, and fixes timing & noise violations at full chip/block level for SoCs.- Strong understanding of digital design concepts,...

STA Physical Design EngineerLOCATION: San Jose, CA (hybrid 3 days onsite)DURATION: 6+ MonthsDescription:Perform static timing analysis (STA) and timing optimization, generate and verifies timing constraints, performs SI/Noise analysis, and fixes timing & noise violations at full chip/block level for SoCs.- Strong understanding of digital design concepts,...

STA Physical Design EngineerLOCATION: San Jose, CA (hybrid 3 days onsite)DURATION: 6+ MonthsDescription:Perform static timing analysis (STA) and timing optimization, generate and verifies timing constraints, performs SI/Noise analysis, and fixes timing & noise violations at full chip/block level for SoCs.- Strong understanding of digital design concepts,...

STA Physical Design EngineerLOCATION: San Jose, CA (hybrid 3 days onsite)DURATION: 6+ MonthsDescription:Perform static timing analysis (STA) and timing optimization, generate and verifies timing constraints, performs SI/Noise analysis, and fixes timing & noise violations at full chip/block level for SoCs.- Strong understanding of digital design concepts,...

STA Physical Design EngineerLOCATION: San Jose, CA (hybrid 3 days onsite)DURATION: 6+ MonthsDescription:Perform static timing analysis (STA) and timing optimization, generate and verifies timing constraints, performs SI/Noise analysis, and fixes timing & noise violations at full chip/block level for SoCs.- Strong understanding of digital design concepts,...

STA Physical Design Engineer LOCATION : San Jose, CA (hybrid 3 days onsite) DURATION: 6+ Months Description: Perform static timing analysis (STA) and timing optimization, generate and verifies timing constraints, performs SI/Noise analysis, and fixes timing & noise violations at full chip/block level for SoCs. - Strong understanding of digital...

STA Physical Design Engineer LOCATION : San Jose, CA (hybrid 3 days onsite) DURATION: 6+ Months Description: Perform static timing analysis (STA) and timing optimization, generate and verifies timing constraints, performs SI/Noise analysis, and fixes timing & noise violations at full chip/block level for SoCs. - Strong understanding of digital design...

As an STA Engineer at iSoftTek Solutions Inc, you will be responsible for performing Static Timing Analysis (STA) for our clients' semiconductor designs. You will have the opportunity to work on cutting-edge technologies and collaborate with cross-functional teams to ensure the successful delivery of projects. We are looking for a candidate who has strong...

As an STA Engineer at iSoftTek Solutions Inc, you will be responsible for performing Static Timing Analysis (STA) for our clients' semiconductor designs. You will have the opportunity to work on cutting-edge technologies and collaborate with cross-functional teams to ensure the successful delivery of projects. We are looking for a candidate who has strong...

As an STA Engineer at iSoftTek Solutions Inc, you will be responsible for performing Static Timing Analysis (STA) for our clients' semiconductor designs. You will have the opportunity to work on cutting-edge technologies and collaborate with cross-functional teams to ensure the successful delivery of projects. We are looking for a candidate who has strong...

STA Physical Design Engineer LOCATION: San Jose, CA (hybrid 3 days onsite) DURATION: 6+ Months Is this the next step in your career Find out if you are the right candidate by reading through the complete overview below. Description: Perform static timing analysis (STA) and timing optimization, generate and verifies timing constraints, performs SI/Noise...