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Design Layout Engineer
2 months ago
At Synopsys, we are at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. If you share our passion for innovation, we want to meet you.
In the System Solutions Group we are shaping solutions for dependable systems, requiring safety, security, reliability, low power and more. Our team works with customers and industry partners to understand their needs and identify technical requirements. We are passionate about methodologies and automation: we collaborate with customers to make their job easier when they develop their products.
Design Layout Engineer - Advanced Packaging
We have an immediate opening for a Design Layout Engineer to work on the growing area of advanced packaging and multi-die design implementation. Using the industry's most advanced silicon design tools, you will provide an end-to-end solution spanning from architecture and design partitioning to floorplan, route and simulation of advanced packaging designs.
In this role, you will engage with several cross-functional teams working on integration of multiple designs into a system. You will gain expertise in the system and packaging implementation of chip-to-chip interfaces such as HBM3/4, UCIe, 3DIO and other high-speed IPs such at PCIe and memory interfaces like DDR5 and LPDDR.
You will work on and drive the progress of latest multi-die designs powering the most innovative GPUs and CPUs in the industry, while contributing to the latest technological advancements around multi-die packaging such as CoWoS, InFO, 3DIC, etc...
Key Qualifications:
- BSEE/MSEE in Electrical and/or Computer Engineering
- At least 5 years of experience in physical design and SOC development.
- Knowledge of Synopsys EDA tools like 3DIC Compiler, IC Compiler II or Fusion Compiler
- Knowledge of backend implementation, simulation and sign-off. This includes EMIR, ESD, STA and thermal simulation.
- Understanding of CAD flows, tools and design methodology development for backend tools.
- Will be able to travel on occasion for short periods of time, and occasionally work on-site at customer premises as required
- Package layout experience is big plus
- 2.5/3D packaging experience and knowledge of CoWoS, InFo, RDL... is a plus.
- Has done multiple tapeouts in advanced nodes such as 14-/10-/7-nm...
- Custom layout experience for analog and RF is a plus
- Digital place and route. This includes floorplanning, signal and power/ground design using industries leading APR tools
- Experience with chip-level thermal and EMIR analysis using Redhawk, generated CPM models, etc...
- Has had direct customer interactions
- Experience working in a customer-centric environment with great communication skills.
- Ability to cross-functionally lead backend and physical design (PD) development through GDS and work with partners and foundries to review designs and tape-outs.
Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.
