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Package Layout Engineer Santa Clara, CA
1 month ago
As the industry strives to meet the demands of the AI workloads, bottlenecks in data transfers between processors and memory have hindered progress. The Photonic Fabric based Memory Fabric provides an optically scalable solution to the ‘Memory Wall’ problem, enabling tens of Terabytes of memory capacity at full HBM bandwidths with low tens of nanoseconds of latency and extremely low power. The Photonic Fabric based Compute Fabric enables Terabyte class bandwidth between compute nodes at low latency and power. Photonic Fabric delivers a transformative leap in AI system performance, ten years more advanced than existing technologies. Job Description: In this role you will utilize your broad semiconductor package layout and design experience in designing package solutions to drive company’s Photonic Fabric family of products from concept to high volume manufacturing. You will be responsible for package design activities with multiple engineering groups, such as Packaging, ASIC, AMS, Photonics and external partners to ensure design for manufacturing, reliability, and cost. This job will require you to have strong project management, written and verbal communication skills as well as a can-do attitude to prioritize and work on projects with a high sense of urgency. ESSENTIAL DUTIES AND RESPONSIBILITIES: All aspects of package design and layout at Silicon, interposer and substrate level for multi-chip SiP packaging All aspects of package design/layout based on Si I/O, Si PI and form factor requirements, including routing, design for reliability, thermal, mechanical, manufacturability, bumping, substrate, material selection, assembly, and support for testing Meeting routing and layout specifications for high-speed interfaces such as HBM, DDR, PCIE and 56G/112G SerDes Actively work with OSAT and Fab houses during package Tape-Out processes and effectively communicate back and forth Drive ideation and innovation of advanced package solutions and specifications with vendors to advance productization efforts by Celestial AI QUALIFICATIONS: BS in EE/ECE/MSE/ME/ChemE or related disciplines 10+ years of experience in Semiconductor Packaging Design and Layout, with at least 6 years of hands-on experience in Advanced Package design Extensive experience and proficiency working with advanced packaging tools such as Cadence APD Familiarity with high density/high performance interconnects in various 2.5D/3D package form factors including InFO, CoWoS, FoCoS and EMIB Familiarity with package manufacturing challenges and design rules related to manufacturing Familiarity with photonics packaging is a plus but not necessary Excellent problem-solving skills with strong fundamentals in science, sound engineering judgment, and analytical ability Effective communicator and comfortable engaging with internal cross functional teams as well as domestic and overseas suppliers Excellent attention to detail, process and operationally oriented and self-driven with the ability to work independently and take projects to completion with minimum supervision We offer great benefits (health, vision, dental and life insurance), collaborative and continuous learning work environment, where you will get a chance to work with smart and dedicated people engaged in developing the next generation architecture for high performance computing. Celestial AI Inc. is proud to be an equal opportunity workplace and is an affirmative action employer. #J-18808-Ljbffr
