DFT (Design For Test) Engineer
2 weeks ago
Position: DFT (Design For Test) Engineer
Location: San Jose ,CA
Duration: Fulltime Permanent
Day 1 Onsite
USC, GC and GC-Ead workable for this fulltime role
Position Description:
Years of exp Required: 08-10 Years
Key Qualifications
5-10 years relevant experience
Knowledge of the latest state-of-the-art trends in DFT, test and silicon engineering.
Hands-on experience with Jtag protocols, Scan and BIST architectures, including memory BIST, IO BIST
Verification skills include System Verilog Logic Equivalency checking and validating the Test-timing of the design.
Experience working with simulation and debugging with VCS and other simulators.
Scripting skills: Python/Perl.
Roles & Responsibilities :
As a DFT engineer you will take part in each design stage of the product.
From product architecture, define DFT solution, implementing the code in RTL, design verification, physical design implementation of DFT HW, pattern generation, gate-level-simulations, timing signoff for DFT mode, prepare pattern for Silicon, Silicon bring-up, test program stabilization, product characterization and preparations for production.
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