DFT Engineer

4 weeks ago

San Diego, United States Intelliswift Software Inc Full time

Must Have skills:

Check below to see if you have what is needed for this opportunity, and if so, make an application asap.

- Strong DFT background (such as Analog DFT, MBIST, IEEE1687 and others)

- Tessent MBIST insertion, tessent MBIST pattern generation and simulation using Tessent flow.

- Memory BIST insertion and verification experience (SRAM, CAM, eDRAM)

Detailed Job Description

ASIC Product Division is seeking candidates for a DFT MBIST IOBIST Lead position at our San Jose, CA location. The successful candidate will be responsible for leading the insertion and verification of MBIST and IOBIST. The candidate would be required to work on various phases of SoC MBIST and IOBIST related activities for Broadcom APD (ASIC Products Division)’s designs – DFT MBIST Architecture, MBIST Test insertion and verification, Pattern generation, Post silicon debug and yield improvement to meet the product test metrics. It involves working with the Physical Design & STA team for DFTMBIST mode timing closure. The role could also involve direct interaction with external customers. It is expected that you can code using TCL, PERL, RUBY, PYTHON, C++ or similar.

Responsibilities:

- Understanding Broadcom & customer DFT feature requirements & DPPM goals & defining appropriate DFT specifications for the ASIC

- Implementing DFT, including MBIST, TAP, SerDes and other IP DFT integration

- Working closely with STA and DI Engineers design closure for test

- Generating, Verifying & Debugging Test vectors before tape release.

- Validating & Debugging Test vectors on ATE during the silicon bring up phase

- Assisting with silicon failure analysis, diagnostics & yield improvement efforts

- Interfacing with the customer, physical design and test engineering manufacturing teams located globally

- Working closely with IP DFT engineers & other stakeholders

- Debugging customer returned parts on the ATE

- Innovating newer DFT solutions to solve testability problems in 7nm & beyond

- Automating DFT & Test Vector Generation flows

Skills Experience:

- Strong DFT background (such as Analog DFT, MBIST, IEEE1687 and others)

- Tessent MBIST insertion, tessent MBIST pattern generation and simulation using Tessent flow.

- Memory BIST insertion and verification experience (SRAM, CAM, eDRAM)

- The ability to work in a multi-disciplined, cross-department environment

- Solid knowledge in analog and digital circuit design, and device physics fundamentals

- Excellent problem solving, debug, root cause analysis and communication skills

- Experience working on ATE is a plus

Education & Experience:

- Bachelors in Electrical Electronic Computer Engineering and 8+ years of relevant industry experience or Masters Degree in Electrical Electronic Computer Engineering and 6+ years of relevant industry experience

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