Physical Design Engineer

Physical Design Engineer (8-15 Years Experience) Work Location - Santa Clara CA USA Customer: TechMahindra Job Description: As a Physical Design Engineer, you will play a crucial role in the RTL to GDS flow, including Synthesis and Place & Route (PNR). You will utilize tools such as Fusion Compiler and Cadence Innovus to optimize designs for...

Physical Design Engineer – Santa Clara, California Permanent position – $120K-$160K base salary Unique opportunity to join an established international company in their North America expansion. Working from the NA headquarters, you will have the ability to be an impact player working with some other exceptionally talented people. The Physical Design...

Senior Physical Design Methodology Engineer page is loaded Senior Physical Design Methodology Engineer Apply locations US, CA, Santa Clara time type Full time posted on Posted 2 Days Ago job requisition id JR1967201 Do you have a passion for computer gaming, virtual reality, computer vision, and artificial intelligence? Ever dream about inventing your own...

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high...

Job Description The Physical Design intern will support the physical design team with all aspects of physical design implementation and verification of Ambarella's cutting edge SoC for sub-28nm technology node. The Physical Design Intern will support the following areas within the physical design team; floor-planning, auto place and route, physical...

Responsibilities:The Physical Design Engineer will be an integral part of the physical design team with all aspects of physical design implementation and verification tasks for Ambarella’s cutting edge low power AI SoC from Netlist to GDSII.The Physical Design Engineer will be responsible for the following areas throughout all phase of SoC...

Astera Labs is a global leader in purpose-built connectivity solutions that unlock the full potential of cloud and AI infrastructure. Our Intelligent Connectivity Platform integrates PCIe, CXL and Ethernet semiconductor-based solutions based on a software-defined architecture that is both scalable and customizable. Inspired by trusted partnerships with...

Job Description & Skill Requirement: 5- 10yrs Exp range engineers Required Port schematics from the previous project Run pre-layout simulations and implement ECOs to meet design targets Prepare and present Pre-Layout Design Review Guide layout engineer to implement the layout Run post-layout simulations and implement ECOs to meet design targets Prepare and...

Job Description & Skill Requirement:5- 10yrs Exp range engineers RequiredPort schematics from the previous projectRun pre-layout simulations and implement ECOs to meet design targetsPrepare and present Pre-Layout Design ReviewGuide layout engineer to implement the layoutRun post-layout simulations and implement ECOs to meet design targetsPrepare and present...

Job Description & Skill Requirement:5- 10yrs Exp range engineers RequiredPort schematics from the previous projectRun pre-layout simulations and implement ECOs to meet design targetsPrepare and present Pre-Layout Design ReviewGuide layout engineer to implement the layoutRun post-layout simulations and implement ECOs to meet design targetsPrepare and present...

Job Description & Skill Requirement:5- 10yrs Exp range engineers RequiredPort schematics from the previous projectRun pre-layout simulations and implement ECOs to meet design targetsPrepare and present Pre-Layout Design ReviewGuide layout engineer to implement the layoutRun post-layout simulations and implement ECOs to meet design targetsPrepare and present...

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high...

Job DescriptionSynthesis using DC Expert in Synthesis to Tape-out flow including Layout DFT Timing Closure and Chip FinishingFloorplan P&R Ability to independently handle complex blocks to closure right from SynthesisPhysical verification (DRC LVS) Worked on at least 2 end to end projects those spanned across entire life cycle of developmentSTA &...

Job DescriptionSynthesis using DC Expert in Synthesis to Tape-out flow including Layout DFT Timing Closure and Chip FinishingFloorplan P&R Ability to independently handle complex blocks to closure right from SynthesisPhysical verification (DRC LVS) Worked on at least 2 end to end projects those spanned across entire life cycle of developmentSTA & Timing...

CPU Design Methodology Engineer page is loaded CPU Design Methodology Engineer Apply locations US, OR, Hillsboro US, TX, Austin US, CA, Santa Clara time type Full time posted on Posted 7 Days Ago job requisition id JR1976410 We are now looking for a CPU Design Methodology Engineer: The complexity of chip development has greatly increased over the years. We...

THE DUTIES:The work will expose the designer to a number of IP including ARM cores, Ethernet, DDR, DMA, PCIE, SATA and client s internal IPs.Successful candidates will be responsible for leading, and participating in, the design of leading edge SoCs in advanced digital CMOS processes.Our RTL Design Engineers are expected contribute in all aspects of SoC...

About Marvell Marvells semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new po Integration, Design, Staff, Electrical Engineer, Computer Science, Physical, Business Services

THE ROLE: This is a Physical Design Engineering role that will require to take the design from RTL to GDS with synthesis, Place n Route, timing, and Physical Verification THE PERSON: Strong communication skills, ability to multi-task across projects, and work with geographically spread-out teams RESPONSIBILTIES: This engineer will work on high-speed...

THE ROLE: This is a Physical Design Engineering role that will require to take the design from RTL to GDS with synthesis, Place n Route, timing, and Physical Verification THE PERSON: Strong communication skills, ability to multi-task across projects, and work with geographically spread-out teams RESPONSIBILTIES: This engineer will work on high-speed...

Position Title: RTL Design Engineer Position Description: Protingent Staffing has an exciting contract opportunity for RTL Design Engineer with our client located in San Jose, CA.Project Description: Responsible for RTL design using Verilog HDL for implementation and debug. Read and comprehend System on Chip level architectural specification. Write...