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Sr. Principal Hardware Power Engineer

2 months ago

Santa Clara, United States Oracle Full time

Job Description - Technical Lead Principal Power Engineer


Oracle's Hardware Development Organization seeks to add an experienced System Power Engineering Technical Lead and Board Power Electrical Design Engineer to work within our Server Development team in Santa Clara, California. As a member of the team, you will have the opportunity to architect, design and integrate the system and on-board power delivery subsystems for next generation Servers based on the latest merchant silicon for compute, storage and communications.


The power requirements of our next generation Oracle servers are very demanding with increasing focus on highly efficient solutions for our cloud and vertically integrated rack level solutions. As a Technical Lead Electrical Design Engineer focusing on Power design, you will be responsible for Power sub-system and board level architecture, power team leadership and detailed design. You will take ownership of the power design work across all product development phases out to the transition to volume production. You will need to stay abreast of the latest developments in the area of power delivery and rapidly adopt & translate these into reliable power delivery subsystems for our Oracle offerings. On occasion, you will advise on power systems from prior products delivered by the hardware development organization.


Detailed Responsibilities:


The list of responsibilities (but not limited to) may include:


  • Technical leadership of a small power engineering team.
  • Participate in rack level, system and board level power architecture and design meetings.
  • Work with power engineers on design schedules for prototype designs.
  • Create and maintain presentations to management on project status.
  • Work out best of class power designs based on performance, part availability and cost.
  1. Design and Test of high power multi phase Voltage Regulator Down designs (VRDs) that meet or exceed the strict performance requirements of next generation third party CPUs. Parts selection and qualification
  2. Schematic Capture
  3. Design analysis and modeling
  4. Board Floor planning
  5. Provide guidance to CAD designers (placement and routing)
  6. Detailed review of CAD work
  7. Lead and participate in formal design reviews
  8. Author specifications
  9. Publish bill of materials
  10. Work with VRD Controller / Power Stage vendors to generate and test configuration files.
  • Design, test and tune analog and digital DC-DC converters with power ranging from 500mA to 600A and Electronic Circuit Breakers.
  • Setup and maintain automation platforms used to validate Power designs.
  • Design and Validate total power solutions for Oracle’s next generation Server machines.
  • Work with various internal teams to assure the power requirements of the system and VRDs meet specifications.
  • Collaborate with internal firmware/software teams on implementing system level diagnostics.
  • Work with various external vendors to assure the power components used in the power designs meet the required specifications and regulatory requirements.
  • Bring up and test prototypes.
  • Develop and implement test plans.
  • Mentor Power Engineers.
  • Perform and lead Lab debug of HW problems.


Desired Skills and Experience


Job Requirements:

  • Experience with being a technical lead of a small team of power engineers.
  • Experience with system-level power distribution and architecture from rack down to chip level.
  1. Experience with the design of high power on-board modern multi-Phase VRD designs as well as DC-DC converters, Voltage regulators and Electronic Circuit Breakers. Experience with I2C/PMBUS/SVID communication bus is preferred.
  2. Experience with Analog and Digital PWM control architectures.
  3. Experience with Power simulation software like SPICE, Simplis, Cadence PowerSI is preferred.
  4. Experience with testing and validation methods of power devices.
  • Strong knowledge and application of high-speed design methodologies for Power Integrity/Signal Integrity.
  • Proficient in the complete flow of CAD design tools such as Cadence, Concept, Allegro.
  • Proficient in constraint driven design methodologies.
  • Experience with the power requirements of high performance CPU processors, GPUs, DDR memory DIMMs, PCIe Cards, Flash modules, disk drives etc.
  • Experience with DC-DC control loop tuning for stability and transient performance.
  • Experience and understanding of effective PCB stack-up design.
  • Excellent communication and leadership skills.
  • Experience with recent Intel/AMD chip sets is a plus.
  • Experience with Digital or Analog Simulation is a plus.