Senior Applications Engineer – DDR Design IP

Core Responsibilities: As a DDR Applications Engineer you will be involved with customer interfacing on all phases of phy and controller design of high performance ddr interface from RFQ, RTL to delivery of our final GDSII. Your responsibilities include but are not limited to: Technical interface with customers and solving problems Considering optimal...

Overview: TekWissen Group is a workforce management provider throughout the USA and many other countries in the world. This Client is an American multinational semiconductor company based in Santa Clara, California, that develops computer processors and related technologies for business and consumer markets. global company that specializes in manufacturing...

Overview: TekWissen Group is a workforce management provider throughout the USA and many other countries in the world. This Client is an American multinational semiconductor company based in Santa Clara, California, that develops computer processors and related technologies for business and consumer markets. global company that specializes in manufacturing...

Overview: TekWissen Group is a workforce management provider throughout the USA and many other countries in the world. This Client is an American multinational semiconductor company based in Santa Clara, California, that develops computer processors and related technologies for business and consumer markets. global company that specializes in manufacturing...

Job Description: Pay Range $50.64hr - $75.97hr The work will expose the designer to a number of IP including Client cores, Ethernet, DDR, DMA, PCIE, SATA and client internal IP. Successful candidates will be responsible for leading, and participating in, the design of leading-edge SoC s in advanced digital CMOS processes. RTL Design Engineers are expected...

Job Description: Pay Range $50.64hr - $75.97hr The work will expose the designer to a number of IP including Client cores, Ethernet, DDR, DMA, PCIE, SATA and client internal IP. Successful candidates will be responsible for leading, and participating in, the design of leading-edge SoC s in advanced digital CMOS processes. RTL Design Engineers are...

Droisys is an innovation technology company focused on helping companies accelerate their digital initiatives from strategy and planning through execution. We leverage deep technical expertise, Agile methodologies, and data-driven intelligence to modernize systems of engagement and simplify human/tech interaction.Amazing things happen when we work in...

ASIC/RTL Design Engineer - Senior (US) San Jose, CA 95124 3 days Onsite 12 Months Contract HM Notes: This is general SOC Design Engineer role. RTL Integration, coding exp required. Understanding interface of IP blocks required Documentation exp Verilog and system Verilog exp will be plus Verification exp will be plus but not...

Droisys is an innovation technology company focused on helping companies accelerate their digital initiatives from strategy and planning through execution. We leverage deep technical expertise, Agile methodologies, and data-driven intelligence to modernize systems of engagement and simplify human/tech interaction. Amazing things happen when we work in...

JOB DUTIES: The work will expose the designer to a number of IP including ARM cores, Ethernet, DDR, DMA, PCIE, SATA and internal IPs. Successful candidates will be responsible for leading, and participating in, the design of leading edge SoCs in advanced digital CMOS processes. Our RTL Design Engineers are expected contribute in all aspects of SoC design...

Job Description: Pay Range $50.64hr - $75.97hr The work will expose the designer to a number of IP including Client cores, Ethernet, DDR, DMA, PCIE, SATA and client internal IP. Successful candidates will be responsible for leading, and participating in, the design of leading-edge SoC s in advanced digital CMOS processes. RTL...

OPENEDGES develops AI edge computing semiconductor IPs, so that more people can enjoy AI technology closer. Location: San Jose, CA, USA or Austin, TX, USA Position: Principal Design EngineerOPENEDGES is the world's only total memory system and AI platform IP solution company that has delivered NPU, memory controllers, DDR PHY, and on-chip interconnect IPs...

OPENEDGES develops AI edge computing semiconductor IPs, so that more people can enjoy AI technology closer.📍 Location: San Jose, CA, USA or Austin, TX, USA📍 Position: Principal Design EngineerOPENEDGES is the world's only total memory system and AI platform IP solution company that has delivered NPU, memory controllers, DDR PHY, and on-chip...

OPENEDGES develops AI edge computing semiconductor IPs, so that more people can enjoy AI technology closer.📍 Location: San Jose, CA, USA or Austin, TX, USA📍 Position: Principal Design EngineerOPENEDGES is the world's only total memory system and AI platform IP solution company that has delivered NPU, memory controllers, DDR PHY, and on-chip...

Job DescriptionThis is an opportunity to join a dynamic and growing team of engineers developing high-speed physical IP for industry-standard protocols. The successful candidate will be a highly self-motivated and results-oriented member of a small team of engineers that can learn and improve existing digital flows. The candidate will primarily be...

Job DescriptionThis is an opportunity to join a dynamic and growing team of engineers developing high-speed physical IP for industry-standard protocols. The successful candidate will be a highly self-motivated and results-oriented member of a small team of engineers that can learn and improve existing digital flows. The candidate will primarily be...

Job DescriptionThis is an opportunity to join a dynamic and growing team of engineers developing high-speed physical IP for industry-standard protocols. The successful candidate will be a highly self-motivated and results-oriented member of a small team of engineers that can learn and improve existing digital flows. The candidate will primarily be...

OPENEDGES develops AI edge computing semiconductor IPs, so that more people can enjoy AI technology closer. Location: San Jose, CA, USA or Austin, TX, USA Position: Principal Design Engineer OPENEDGES is the world's only total memory system and AI platform IP solution company that has delivered NPU, memory controllers, DDR PHY, and on-chip...

Senior ASIC Design Engineer | AI Start-up | AI interference Solutions | San JoseAre you a Senior-level Design Engineer with experience, or looking to work, in Generative AI?This is an opportunity to join a highly funded and expanding startup, working on cutting-edge projects at the forefront of autonomous driving and AI!As a senior member of the ASIC team,...

Mastech Digital is hiring a SoC Integration Engineer for one of their prestigious clients in San Jose, CA.Location - Onsite in San Jose, CA (Selected candidates will be working 5 days per week onsite). Prefer Local Candidates to apply who can come for in-person interviews.Relocation assistance - There is no relocation assistance provided for this role. Only...