Application Specific Integrated Circuit Design Engineer

3 weeks ago


San Jose, United States Droisys Full time

Droisys is an innovation technology company focused on helping companies accelerate their digital initiatives from strategy and planning through execution. We leverage deep technical expertise, Agile methodologies, and data-driven intelligence to modernize systems of engagement and simplify human/tech interaction.

Amazing things happen when we work in environments where everyone feels a true sense of belonging and when candidates have the requisite skills and opportunities to succeed. At Droisys, we invest in our talent and support career growth, and we are always on the lookout for amazing talent who can contribute to our growth by delivering top results for our clients. Join us to challenge yourself and accomplish work that matters.

Client Description

Our client is a major Fortune 500 company and one of the world’s most innovative and cutting-edge technology companies, and this role is in the Interactive department.

Droisys is seeking

RTL ASIC Design Engineer

job offering hybrid onsite work for a long-term job opportunity in

San Jose, CA

area of the USA.

Job Description

Job Title RTL ASIC Design Engineer Job Location San Jose, CA [Onsite Hybrid Work] Duration 12 Months [Contract job with potential extensions]

Key Skills ARM cores, CMOS, RTL Design, ASIC, SoC, IP Integration, I/O standard interfaces

Job Details

The work will expose the designer to several IP including ARM cores, Ethernet, DDR, DMA, PCIE, SATA and internal IPs. Successful candidates will be responsible for leading, and participating in, the design of leading edge SoCs in advanced digital CMOS processes. Our RTL Design Engineers are expected contribute in all aspects of SoC design including: Chip definition, Architecture development and modelling, Development of micro-architectural specifications, Conversion of micro-architectural specifications to logic implementation, Verification, emulation, debug, synthesis, and timing closure, Interfacing with physical execution, software, and silicon bring-up teams.

Required Experience SoC Design. Knowledge AND hand-on experience from industry ASIC design flow including RTL coding, IP Integration, debugging/verification, and supporting synthesis and timing closure. Working knowledge of ARM cores and other I/O standard interfaces. Roughly 10 years’ experience, but less is acceptable. Bachelor’s in electrical engineering or computer engineering is acceptable

Droisys is an equal opportunity employer. We do not discriminate based on race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law. Droisys believes in diversity, inclusion, and belonging, and we are committed to fostering a diverse work environment.

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