Senior/Principal CPU Power Supply Engineer

Found in: Appcast Linkedin GBL C2 - 3 weeks ago


Austin, United States MediaTek Full time

*This position requires at least 8+ years of experience in power management design


The MediaTek CPU design team is seeking an experienced engineer to deliver on-die power supply design solutions for high-performance processors. In this role, you will be responsible for defining and designing the CPU power supply system. This includes the schematic design of DC-DC power converters or LDOs, providing supply quality and efficiency analysis, and estimating system performance improvements.


You will collaborate with custom layout engineers and physical design engineers to bring the design to fruition and perform post-layout validation. This role also requires providing a PI signoff model and working closely with PI engineers to meet the on-die IR-drop signoff criteria.


Furthermore, you will contribute to package designs, an essential part of the overall CPU power roadmap. If you have a strong background in engineering and a passion for innovation, we encourage you to apply. This is an excellent opportunity to contribute to cutting-edge CPU design and power optimization strategy.




Job Requirement

• Good experience in power management circuit designs including buck and boost regulator, Low Dropout Regulators (LDOs) for mobile system.

• Experience in driving high-quality analog custom layout

• Strong knowledge in analog IC flow and CAD tools including Cadence Virtuoso and Matlab

Experience with mixed-signal simulation in the cadence AMS environment

• Good understand of CPU DVFS design and low-power scenarios

• Have good understanding of die-package-board power delivery network co-design constraints and tradeoffs.

• Experience in AMS simulation and design validation methodologies

• Experience in programing or scripting language for data analysis and flow automation

• Analog circuit behavior modeling using Verilog-AMS or Verilog-A

• Minimum 8+ years of working experience on power management circuit designs



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