ASIC EDA Engineer
2 weeks ago
The Opportunity:
In this hands-on, technology leadership role, you will lead EDA tools and associated engineering workflow development for multimodal generative AI inference acceleration products. This is a hands-on role that’s ideal for ASIC EDA experts who have a multi-disciplinary engineering background, along with a keen interest in generative AI, and a passion for designing, debugging, optimizing and finding creative EDA solutions to complex technical challenges. In this role, you will work very closely with your ASIC team members who are engaged in the design and verification of products, to understand and improve their workflows and EDA needs.
What you’ll bring:
- 10+ years of hands-on ASIC engineering experience, that includes deep knowledge of VLSI/SoC chip design and verification workflows, with ASIC EDA tool suites from Synopsys and/or Cadence, for physically-aware logic synthesis, RTL and gate-level simulation, structural analysis (CDC, RDC, etc.) and lint tools, ECO creation and LEC tools, and other commonly-used parts of the ASIC development ecosystem.
- Strong programming and debugging skills with SystemVerilog as well as with key languages to automate tasks and improve efficiency like C/C++, Perl, TCL and Python, with experience developing tools for design verification scripting as well as HDL code generators and scripts for creating hard macros from higher level descriptions.
- Experience leading the development and support for compilation, build automation, testing, packaging and installation project generators that build object files like either CMake, GNU make, and/or Ninja, as well as experience with CI/CD and modern Git Branching workflows.
- Prior work experience with onboarding and supporting ASIC engineers with EDA workflows, including installation of new tool versions, FlexLM license management, and debugging/fixing issues with EDA vendors.
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