Current jobs related to ASIC EDA Engineer - San Jose - ITCO Solutions, Inc.
-
Principal ASIC Design Engineer
2 days ago
San Jose, California, United States Triton R&D Consulting, LLC Full timeJob Title: Principal ASIC Design EngineerJob Summary:We are seeking a highly skilled Principal ASIC Design Engineer to lead our front to back design efforts. As an expert in ASIC design, you will be responsible for establishing and maintaining synthesis, static timing analysis, and equivalency flows. You will work closely with ASIC design engineers to ensure...
-
ASIC Synthesis Engineer
2 weeks ago
San Jose, California, United States AXONNE Full timeCompany OverviewAxonne Inc. is a pioneering semiconductor solutions provider in the automotive industry, specializing in innovative in-vehicle network semiconductor solutions. Our mission is to deliver high-performance, reliable, and cutting-edge semiconductor products that meet the demanding requirements of automotive electronics.Key ResponsibilitiesDevelop...
-
ASIC Synthesis/STA Engineer
3 months ago
San Jose, United States AXONNE Full timeCompany Overview:Axonne Inc. is a Silicon Valley startup that provides cutting-edge semiconductor solutions for the automotive industry with innovative in-vehicle network semiconductor solutions. We are dedicated to delivering high-performance, reliable, and state-of-the-art semiconductor products to meet the demanding requirements of automotive electronics....
-
ASIC Synthesis/STA Engineer
2 weeks ago
San Jose, California, United States AXONNE Full timeCompany OverviewAxonne Inc. is a pioneering Silicon Valley startup that delivers cutting-edge semiconductor solutions for the automotive industry. Our innovative in-vehicle network semiconductor solutions are designed to meet the demanding requirements of automotive electronics.Key ResponsibilitiesDevelop and execute synthesis, DFT, and static timing...
-
Senior ASIC Physical Design Engineer
2 weeks ago
San Francisco, California, United States Capgemini Full timeJob Title: Senior ASIC Physical Design EngineerJob Summary:Capgemini is seeking a highly skilled Senior ASIC Physical Design Engineer to join our team. As a key member of our engineering team, you will be responsible for designing and implementing advanced ICs using cutting-edge technologies. Your expertise in physical design, timing closure, and signoff...
-
Digital ASIC Design Engineer
3 days ago
San Diego, California, United States Qualcomm Full timeJob SummaryQualcomm is seeking a highly skilled Digital ASIC Design Engineer to join our team. As a key member of our Engineering Group, you will be responsible for defining, modeling, designing, optimizing, verifying, validating, implementing, and documenting IP (block/SoC) development for high-performance, high-quality, low-power products.Key...
-
Senior ASIC Engineer
2 weeks ago
San Diego, California, United States ACL Digital Full timeJob Description:ACL Digital is seeking a highly skilled Senior ASIC Engineer to join our team. As a key member of our design team, you will be responsible for defining, modeling, designing, optimizing, verifying, validating, implementing, and documenting IP (block/SoC) development for high-performance, high-quality, low-power products.Key...
-
ASIC DFT Engineer
4 weeks ago
San Jose, California, United States Cisco Full timeAbout the RoleCisco is seeking an experienced ASIC Design for Test Hardware Engineer to join our Silicon One development organization in San Jose, CA.This role will focus on implementing Hardware Design-for-Test (DFT) features that support ATE, in-system test, debug, and diagnostics needs of the designs.Key ResponsibilitiesImplement DFT features that support...
-
Physical Design Engineer
4 weeks ago
San Jose, California, United States Cisco Full timeAbout the RoleCisco is seeking a highly skilled Physical Design Engineer to join our Silicon One development organization in San Jose, CA. As an ASIC Implementation Technical Lead, you will be responsible for driving Design-for-Test requirements early in the design cycle and working closely with Front-end RTL teams and backend physical design teams to...
-
Senior ASIC Physical Design Engineer
1 week ago
San Francisco, California, United States Capgemini Full timeJob Title:Senior ASIC Physical Design EngineerJob Summary:Capgemini is seeking a highly skilled Senior ASIC Physical Design Engineer to join our team. As a key member of our engineering team, you will be responsible for designing and implementing advanced ASICs for various industries.Key Responsibilities:Design and implement high-performance ASICs using...
-
Senior ASIC Physical Design Engineer
3 days ago
San Francisco, California, United States Capgemini Full timeJob SummaryCapgemini Engineering is seeking a highly skilled Senior ASIC Physical Design Engineer to join our team. As a key member of our design team, you will be responsible for the physical design of complex digital ASICs, from RTL or gate netlist to tape-out release.Key ResponsibilitiesTake ownership of the physical chip development, executing from...
-
Senior ASIC Engineer
3 weeks ago
San Diego, California, United States ACL Digital Full timeJob Description:ACL Digital is seeking a highly skilled Senior ASIC Engineer to join our team. The ideal candidate will have a strong background in digital design verification and system-on-chip architecture.Key Responsibilities:Define, model, design, optimize, verify, validate, implement, and document IP (block/SoC) development for high-performance,...
-
ASIC DFT Engineer
1 week ago
San Jose, California, United States Cisco Full timeAbout the RoleCisco is seeking an experienced ASIC DFT Engineer to join our Silicon One development organization in San Jose, CA. As a key member of our team, you will be responsible for implementing Hardware Design-for-Test (DFT) features that support ATE, in-system test, debug, and diagnostics needs of our designs.Key ResponsibilitiesImplement DFT features...
-
Senior HPC EDA Infrastructure Engineer
6 days ago
San Jose, California, United States Advanced Micro Devices , Inc. Full timeJob Summary:We are seeking a highly skilled Senior HPC EDA Infrastructure Engineer to join our team at Advanced Micro Devices, Inc. This role will be responsible for establishing and maintaining AMD's technological leadership position in HPC EDA infrastructure in the semiconductor industry. The successful candidate will represent AMD to the outside technical...
-
Senior ASIC Digital Design Engineer
2 days ago
San Diego, California, United States Qualcomm Full timeJob SummaryWe are seeking a highly skilled Senior ASIC Digital Design Engineer to join our team at Qualcomm. As a key member of our engineering group, you will be responsible for defining, modeling, designing, optimizing, verifying, validating, implementing, and documenting IP (block/SoC) development for high-performance, high-quality, low-power products.Key...
-
Sr. Engineer CAD/EDA
4 weeks ago
San Jose, United States Xoriant Corporation Full timeTitle: Front End Infrastructure/CAD Sr. EngineerDuration: 6+ months contract (Long Term Project-Possible Extension)Rate: $100/hr-$110/hr on W2 without benefitsWork location : San Jose, CA (Hybrid-3 Days Onsite)DescriptionSeeking a highly motivated Engineer with past experience working on Design Verification flows and solutions.This role involves creating and...
-
ASIC Synthesis/STA Engineer
2 months ago
San Jose, California, United States AXONNE Full time**Company Overview:**Axonne Inc. is a pioneering semiconductor solutions provider in the automotive industry, delivering cutting-edge in-vehicle network semiconductor solutions. Our mission is to offer high-performance, reliable, and state-of-the-art semiconductor products that meet the demanding requirements of automotive electronics.**Key...
-
Senior ASIC Design Verification Engineer
3 days ago
San Diego, California, United States ACL Digital Full timeJob Title: Senior ASIC Design Verification EngineerJob Summary:ACL Digital is seeking a highly skilled Senior ASIC Design Verification Engineer to join our team. The ideal candidate will have a strong background in design verification, system-level design, and hardware architecture. Key Responsibilities:Apply ASIC knowledge and experience to define, model,...
-
ASIC Engineer
4 weeks ago
San Jose, California, United States Cisco Full timeAbout the RoleCisco is seeking a highly skilled ASIC Engineer to join our team. As an ASIC Engineer, you will be responsible for designing and developing complex digital circuits and systems.Key ResponsibilitiesDesign and develop digital circuits and systems using various programming languages and tools.Collaborate with cross-functional teams to ensure...
-
Analog Mixed Signal CAD Development Engineer
1 week ago
San Jose, California, United States Western Digital Full timeJob DescriptionKey Responsibilities:Develop and maintain EDA design environments for analog and mixed signal ASIC design in advanced nodes.Collaborate with the IT team to fulfill advanced nodes specific requests.Ensure the operation and support of EDA tools within the CAD/IT team for all ASIC designers worldwide.Manage the quality and ISO26262 requirements...
ASIC EDA Engineer
2 months ago
The Opportunity:
In this hands-on, technology leadership role, you will lead EDA tools and associated engineering workflow development for multimodal generative AI inference acceleration products. This is a hands-on role that’s ideal for ASIC EDA experts who have a multi-disciplinary engineering background, along with a keen interest in generative AI, and a passion for designing, debugging, optimizing and finding creative EDA solutions to complex technical challenges. In this role, you will work very closely with your ASIC team members who are engaged in the design and verification of products, to understand and improve their workflows and EDA needs.
What you’ll bring:
- 10+ years of hands-on ASIC engineering experience, that includes deep knowledge of VLSI/SoC chip design and verification workflows, with ASIC EDA tool suites from Synopsys and/or Cadence, for physically-aware logic synthesis, RTL and gate-level simulation, structural analysis (CDC, RDC, etc.) and lint tools, ECO creation and LEC tools, and other commonly-used parts of the ASIC development ecosystem.
- Strong programming and debugging skills with SystemVerilog as well as with key languages to automate tasks and improve efficiency like C/C++, Perl, TCL and Python, with experience developing tools for design verification scripting as well as HDL code generators and scripts for creating hard macros from higher level descriptions.
- Experience leading the development and support for compilation, build automation, testing, packaging and installation project generators that build object files like either CMake, GNU make, and/or Ninja, as well as experience with CI/CD and modern Git Branching workflows.
- Prior work experience with onboarding and supporting ASIC engineers with EDA workflows, including installation of new tool versions, FlexLM license management, and debugging/fixing issues with EDA vendors.
