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Senior Design Verification Engineer

4 months ago

San Jose, United States USA Tech Recruitment Full time
  • Senior ASIC Verification Engineer | AI Start-up | AI interference Solutions / Autonomous Driving | San Jose Are you a Senior-level Verification Engineer with experience or looking to work in Generative AI?
  • This is an opportunity to join a highly funded and expanding startup, working on cutting-edge projects at the forefront of autonomous driving and AI
  • SoC/Subsystem verification of embedded CPUs such as ARM/RISC-V and interconnect subsystem (including C and assembly diag validation) Develop the block-level, sub-system and full-chip verification environment and tests to implement test plans.
  • Qualifications: 5+ years of ASIC verification experience.
  • Knowledge of ARM/MIPS/RISC-V Architectures, Memory hierarchy, Cache coherency, Virtual memory, Multicore CPU operation Familiarity with AMBA/APB/AXI Protocol Familiarity with processor peripheral interfaces like SPI, eMMC, *MII, GPIO, I2C
  • Excellent Verilog/System Verilog programming skills.
  • Experience with UVM (or similar).
  • The opportunity to play a key role in shaping one of the most exciting and impactful startups globally, revolutionizing a future-defining market like autonomous driving.