Senior Design Verification Engineer

Company Quest Global Job Area Hardware Engineering Job Description Summary General Summary: Senior Design Verification Engineer Join the Quest Global as a Senior Design Verification Engineer for the most cutting-edge work. Quest Global assists its customers in developing their next generation flagship product lines (mobile devices, complex routers/switches,...

Synapse Design is looking forward to hire Design Verification Engineer expert.Experience:: +10 yearsRequirements:Solid programming skills in C/C++, Verilog, System Verilog, UVM, assembly, Perl/Python.Proficient in debugging complex SOC or CPU core designs involving multithreading, scheduling.Experience in triaging regressions, debugging, and resolving down...

Synapse Design is looking forward to hire Design Verification Engineer expert.Experience:: +10 yearsRequirements:Solid programming skills in C/C++, Verilog, System Verilog, UVM, assembly, Perl/Python.Proficient in debugging complex SOC or CPU core designs involving multithreading, scheduling.Experience in triaging regressions, debugging, and resolving down...

Synapse Design is looking forward to hire Design Verification Engineer expert.Experience:: +10 yearsRequirements:Solid programming skills in C/C++, Verilog, System Verilog, UVM, assembly, Perl/Python.Proficient in debugging complex SOC or CPU core designs involving multithreading, scheduling.Experience in triaging regressions, debugging, and resolving down...

Senior ASIC Verification Engineer | AI Start-up | AI interference Solutions / Autonomous Driving | San JoseAre you a Senior-level Verification Engineer with experience or looking to work in Generative AI?This is an opportunity to join a highly funded and expanding startup, working on cutting-edge projects at the forefront of autonomous driving and AI!As a...

Synapse Design is looking forward to hire Design Verification Engineer expert. Experience:: +10 years Requirements: Solid programming skills in C/C++, Verilog, System Verilog, UVM, assembly, Perl/Python. Proficient in debugging complex SOC or CPU core designs involving multithreading, scheduling. Experience in triaging regressions, debugging, and...

Role Description This is a full-time, on-site role as a Design Verification Engineer SOC at Mirafra Technologies. As a Design Verification Engineer SOC, you will be responsible for tasks such as formal verification, RTL design, computer architecture, functional verification, and debugging. Your work will contribute to the development and validation of...

Architect block and full-chip verification environments using HVLs and constrained random techniques for SOCs with embedded CPUs and mixed signal interfaces. Requires UVM, System Verilog, SVA ○ Develop test plans and coverage metrics from specifications and write block and chip-level tests in C,SV,UVM ○ Debug RTL and Gate simulations and work with...

Architect block and full-chip verification environments using HVLs and constrained random techniques for SOCs with embedded CPUs and mixed signal interfaces. Requires UVM, System Verilog, SVA ○ Develop test plans and coverage metrics from specifications and write block and chip-level tests in C,SV,UVM ○ Debug RTL and Gate simulations and work with...

Company Quest Global Make sure to apply with all the requested information, as laid out in the job overview below. Job Area Hardware Engineering Job Description Summary General Summary: Senior Design Verification Engineer Join the Quest Global as a Senior Design Verification Engineer for the most cutting-edge work. Quest Global assists its customers in...

Design Verification Engineer - Remote / San Jose, CADuration – 6 months + (can be extended longer)San Jose, CA / Remote Design Verification EngineerUVMSystem VerilogTest Bench DevelopmentSystemC (preferred) strong C/C++

Design Verification Engineer - Remote / San Jose, CADuration – 6 months + (can be extended longer)San Jose, CA / Remote Design Verification EngineerUVMSystem VerilogTest Bench DevelopmentSystemC (preferred) strong C/C++

Design Verification Engineer - Remote / San Jose, CADuration – 6 months + (can be extended longer)San Jose, CA / Remote Design Verification EngineerUVMSystem VerilogTest Bench DevelopmentSystemC (preferred) strong C/C++

Design Verification Engineer – San Jose, CA Acceler8 Talent is currently seeking a skilled Design Verification Engineer to join one of the world's leader in AI innovation, that specializes in the design of high-performance, low-power AI inference solutions.You'll play a key role by ensuring their perception software sees the road correctly, collaborating...

Design Verification Engineer – San Jose, CA Acceler8 Talent is currently seeking a skilled Design Verification Engineer to join one of the world's leader in AI innovation, that specializes in the design of high-performance, low-power AI inference solutions.You'll play a key role by ensuring their perception software sees the road correctly, collaborating...

Design Verification Engineer – San Jose, CA Acceler8 Talent is currently seeking a skilled Design Verification Engineer to join one of the world's leader in AI innovation, that specializes in the design of high-performance, low-power AI inference solutions. You'll play a key role by ensuring their perception software sees the road correctly,...

Job Description Full time, direct hire role at client (semiconductor company) Lead verification efforts on PCIe IPs and SoC products Architect and build system and unit-level UVM verification environment Work with architects to define verification strategy and execution plans Review metrics and deliver task with high quality Analyze Functional, Code, and...

Job Title: Verification Engineer Location: San Jose, CA POSITION SUMMARY QUALIFICATIONS: Education Requirements •BS/MS in EE/CE, plus 5+ years of Design Verification experience •Familiarity with ASIC, Computer and Embedded Systems Architectures •Excellent oral and written communication skills with people at all levels, a must. •Team player, with...

Position: design verification Engineer Location: Mountain view, CA Job Type: Fulltime/contract Requirement For Performance DV DV engineer with 5- 8 years of experience. Traditional DV (SV/UVM )as well as performance DV. For performance DV, experience with Python scripting (addition to the DV ) is must. Performance...

As a GPU Design Verification Engineer you will contribute to the functional verification of GPU Subsystems such as Shader, Texture, and Memory Systems. Responsibilities • Triage regression failures and make testbench updates • Debug functional errors in RTL model using simulation and debug tools. • Maintain efficient and clean regression status •...