Verification Engineer

3 days ago


Austin, Texas, United States NextGenPros Inc Full time

Hi

Hope you are doing good.

We have a job opportunity for Verification Engineer. This is a contract position. Please check the job description and let me know if you are fine with this.

Title: Verification Engineer

Location: San Jose, CA/ Austin, TX/ Boston, MA (Hybrid)

Duration: Full Time

Job Description:

We are seeking a skilled
Verification Engineer
with strong expertise in
ARM-based SoC verification
,
AMBA protocols
, and
Coresight debug architecture
. The ideal candidate will be responsible for developing and executing comprehensive verification strategies for complex SoC designs integrating ARM M7 cores and high-speed interfaces.

Key Responsibilities:

  • Develop and implement
    verification test plans
    and
    environments
    for SoC components using
    SystemVerilog / Verilog
    and
    UVM
    .
  • Verify
    ARM Cortex-M7
    and
    Coresight
    subsystems, including debug and trace components.
  • Perform
    functional and protocol-level verification
    of
    AMBA interfaces (AXI, AHB, APB)
    .
  • Create
    test benches
    , develop
    test cases
    , and drive
    coverage closure
    .
  • Collaborate with SoC architects and RTL design engineers to understand design intent and ensure functional correctness.
  • Debug test failures using simulation tools and waveform analysis.
  • Integrate IPs and validate SoC-level functionality, including
    clock, reset, and power domains
    .
  • Support post-silicon validation teams with simulation-based test scenarios and coverage data.

Required Skills and Experience:

  • 3+ years
    of experience in
    SoC / IP functional verification
    .
  • Hands-on experience with
    ARM cores (preferably Cortex-M7)
    and
    Coresight architecture
    .
  • Strong understanding of
    AMBA protocols
    — AXI, AHB, APB.
  • Proficiency in
    Verilog
    ,
    SystemVerilog
    , and
    UVM methodology
    .
  • Good knowledge of
    SoC integration
    and
    bus-level interfaces
    .
  • Experience with industry-standard
    simulation tools
    (e.g., VCS, QuestaSim, or Incisive).
  • Familiarity with
    coverage-driven verification
    and
    debug tools
    .
  • Exposure to
    script automation
    using Python, Perl, or TCL is a plus.


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