Product Development Engineer

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.

The role is Product Development Engineer for high-performance designs going into industry leading AI/ML architectures. Product Development Engineers are critical in driving cost, quality, and time-to-market KPIs during new product introduction. This role ensures planning and verification of test coverage and development of screening methodologies for AI/ML and RISC- V microprocessors, driving product quality through data analysis and statistical modeling, from pre-silicon planning through high volume manufacturing and customer experience. You will be expected to work with design, system architects, product/test owners, reliability, and customer engineers. The work is done collaboratively with a group of highly experienced engineers across various domains of the ASIC. We are looking for someone with the will to overcome challenging problems, develop effective solutions and drive continuous improvement. A results-oriented engineer with good stakeholder management skills which are crucial when interfacing with
various teams across Tenstorrent.

This role is hybrid, based out of Santa Clara, CA, Austin, TX, Fort Collins, CO or Toronto, Canada.

We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

Responsibilities:

• Develop an understanding of product IP, chiplets, and SOCs and their mission-mode/customer usage
• Conducting in-depth and cross-functional investigations and analysis to eliminate causes of systematic and random issues relating to quality, reliability, and customer observations.
• Analysis of characterization and end-to-end manufacturing data from WAT, Sort, Package and System level test, to identify failure mechanisms, preventive actions, and weakness in test strategy, to enhance test coverage and screening methodologies.
• Data extraction, summarization, prediction, correlation, and regression analysis.
• Ensuring that correct product test conditions are implemented for optimal yield, quality, and performance. Identifying test coverage gaps, providing data-driven improvement plans.
• Maintaining excellent communication and cross-functional brainstorming with different product stakeholders (Product Engineering and Test teams, Quality and Reliability, IP/Chiplet/SOC design, Platform debug Leads etc.).
• Drive initial silicon bring-up, and debug, and provide feedback for changes needed for volume production. This is covering Wafer Test, Package Test, Qual testing, etc.
• Drive requirements and inputs for ATE Probe Cards and load boards, Burn-In HTOL boards, SLT interface boards, and sockets.
• Collect and analyze volume fault data for root cause identification and yield improvement opportunities.
• Track and help improve production yield.
• Debug issues found during validation and production.
• Generate voltage/frequency shmoos.
• Determine characterization test needs and requirements for ASICs for volume production.
• Leverage lessons from current products to drive continuous improvements into future products.
• Mentoring less experienced engineers.

Experience & Qualifications:

• BS/MS/PhD in EE/ECE/CE/CS with at least 5 years of industry experience in advanced testing techniques.
• Experience with SLT, ATE, new product introduction, and high-volume production enablement.
• Experience interfacing with OSATs and delivering ATE patterns for production runs.
• Expertise with processor characterization, speed path testing, frequency/power sort using ATE, and guard-banding for volume shipping.
• Experience testing CPUs, high speed SERDES, PCIe, DDR, and PLLs is desirable.
• Basic understanding of DFT fault models.
• Good understanding of PCB fabrication, server-class compliance standards, signal, and power integrity (SI/PI) methods, thermal and mechanical analysis tools.
• Good understanding of diagnostic and yield enhancement tools.
• Strong scripting skills in C/C++, Python, Perl, Java, Bugzilla, TCL, or Ruby.

Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.

This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology.  Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2).   These requirements apply to persons located in the U.S. and all countries outside the U.S.  As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency.  If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.