Senior ASIC Design Engineer
6 days ago
Responsibilities:
- Define and bring up FPGA platforms for pre-silicon validation and software development
- Map ASIC RTL to FGPA while minimizing code base differences
- Create and execute test plans for validating SoC functionality and performance
- Resolve challenging system level issues that span multiple disciplines
- Design logic starting from specification or high level feature description
- Minimum of 5 years of relevant experience.
- Scripting or programming experience in Python or C/C++
- Ability to write and analyze the completeness of constraints
- Familiarity with lab equipment including logic analyzers, oscilloscopes, and multimeters
- Strong analytical and debugging skills
- BS in Electrical Engineering or equivalent required, MS preferred
- Familiarity with Xilinx FPGA's and Vivado tool chain
- Experience with validating and debugging low-power wireless systems
- Understanding of common interfaces and bus protocols (e.g. I2C, SPI, AHB)
- Knowledge of wireless protocols (e.g. Bluetooth Low Energy)
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Senior ASIC Engineer
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Senior ASIC Engineer
6 days ago
San Jose, CA, United States Top Engineer Full timeTOP ENGINEER JOB POST!!! Confidential Search for International Employer Industry: Electronics / Semiconductors Degree: BSEE Required (MSEE Preferred) Experience: 10+ years with Full ASIC/SoC Lifecycle CUTTING-EDGE CUSTOM ASICs & SOCs FOR EMERGING TECHNOLOGIES Role: Senior ASIC Engineer - ARM-Based Systems Join a cutting-edge developer of custom ASICs...
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Senior ASIC Design Verification Engineer
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Sr ASIC Design Engineer
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