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Senior Formal Verification Engineer
2 months ago
We are seeking an experienced Formal Verification leader to join our team at Advanced Micro Devices, Inc. as a Senior Formal Verification Engineer.
Key Responsibilities- Own the formal verification of a state-of-the-art industry leading Data Fabric IP for AMD's CPUs, GPUs, and APUs.
- Partner with members of the team for scoping work, resources, dependencies, and potential risks for project milestone scheduling.
- Identify blocks suitable to deploy formal verification.
- Work with design team to create FV test plan.
- Build formal verification environment, write assertions, covers, and appropriate constraints.
- Build sign-off methodology with Formal.
- Deploy advanced convergence techniques using abstraction models and bug hunting methods.
- Create a common formal verification flow so properties and assertions can be ported to different hierarchies.
- Provide training and mentorship to design teams and other FV engineers on methodology and best-known practices.
- Architected and developed complex Formal verification environments and infrastructure, including scripting using Perl, tcl, or similar.
- Exposure to RTL design, formal verification, or other related domains.
- Exposure to low power formal techniques.
- Preferable experience with Formal Verification Tools (e.g. VC Formal, Jasper, IFV).
- Cache coherency or industry standard AMBA protocol knowledge is a plus.
Degree in Electrical Engineering, Computer Architecture, or Computer Science with a focus on computer architecture is preferred.
LocationFort Collins, CO preferred.