Silicon Verification Engineer

2 weeks ago


Mountain View, California, United States Experis Full time

Our client, a leading global technology corporation, is seeking a Silicon Verification Engineer to support their digital IP intellectual property and acceleration efforts. This REMOTE contract job opportunity requires 2+ years of experience with UVM, System Verilog, and Test Bench Development to align successfully with this organization.

Key Responsibilities:

  • Support digital IP intellectual property and acceleration, including DMA (Direct Memory Access) functions and data compression, decompression, encryption, and decryption.
  • Participate in the test-plan generation process, creating, testing, and implementing various verification plans.
  • Define, document, and implement a UVM verification environment, including agents and scoreboards.
  • Develop tests, test generators, test benches, checkers, coverage, and other verification collateral.
  • Run tests on RTL and Gate Level Netlists, debug failures to root cause, and recommend fixes.
  • Support post-silicon verification activities of the products working with design and product teams.

Requirements:

  • 2+ years of experience with UVM (Universal Verification Methodology)
  • 2+ years of experience with System Verilog – VMM/OVM/UVM
  • 2+ years of experience with Test Bench Development.
  • Experience in pre and post silicon verification test flow and automated test benches.
  • Effective communication, collaboration, and teamwork skills.
  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related degree required.


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