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Head of Test Engineering Operations
2 months ago
Elevate Semiconductor is dedicated to delivering exceptional semiconductor and system testing solutions through our innovative test integrated circuits (ICs) that tackle the industry's most intricate ATE challenges. Our commitment is to surpass our clients' expectations by designing solutions that prioritize low power consumption and high density, ultimately aiming for the most cost-effective testing methods.
We are seeking a Head of Test Engineering Operations to join our dynamic team and spearhead the continuous enhancement of our semiconductor testing expertise.
The test operations division at Elevate Semiconductor plays a crucial role throughout the entire product lifecycle, from initial concept to end-of-life support. This multifaceted team engages in both project development and operational maintenance. The selected candidate will oversee their designated projects from Design for Test (DFT) through to development and mass production.
In the initial concept phase, the candidate will collaborate with the development team on DFT and Design for Manufacturing (DFM) strategies and their execution. As the project transitions into the silicon development stage, the Head of Test Engineering Operations will be responsible for comprehensively developing all facets of the testing application, including ATE hardware and software.
During the silicon evaluation phase, close collaboration with the Product Engineer will be essential to establish a characterization program and assess device performance.
As production commences, the candidate is expected to liaise with production facilities to facilitate the application transfer and address any sustaining issues that may arise. Sustaining responsibilities encompass evaluating test programs and data logs to optimize testing durations and yields, as well as adapting processes for capacity flexibility and cost efficiency.
The candidate will serve as the primary technical liaison for test engineering with both development teams and production facilities. Success in this role will hinge on effective design for test methodologies and yield enhancement initiatives.
The devices developed by Elevate Semiconductor are sophisticated analog components featuring substantial analog and minimal digital content. The ideal applicant will possess extensive expertise in analog test development.
Key Responsibilities
- Lead and continuously advance the Test Engineering discipline, including managing direct reports, establishing standards and infrastructure, overseeing our internal test floor and equipment, and refining yield management systems and processes.
- Design load boards, probe cards, and test software to comprehensively ATE test VLSI SOC devices that incorporate both significant digital content and analog components, as well as high-speed SerDes buses.
- Formulate high-level test engineering strategies by product families and develop test programs for multi-site testing, encompassing both final test (package) and wafer-level testing.
- Collaborate with external vendors for the development of load boards and sockets for new devices.
- Possess a robust understanding of analog IC testing methodologies.
- Utilize standard translation tools (such as Velocity, Test Insight, or similar) for vector conversion from simulation files in VCD/EVCD and WGL formats.
- Demonstrate knowledge of scan techniques, at-speed scan, JTAG, Memory BIST, OTP memory programming, and loopback methodologies.
- Develop ATE characterization programs for critical data sheet parameters.
- Engage with designers to innovate complex testing methodologies that surpass current tester capabilities.
- Exhibit expertise in large-scale ATE platforms, such as Teradyne Ultraflex (preferred) and/or Verigy Pinscale/Smartscale.
- Support the initiation and maintenance of test programs at overseas vendors and assist production with any ATE-related challenges.
- Collaborate with Product Engineers, FA, and QA teams for production qualification and customer-related issues.
- Work with team members and vendors to define ATE Test Specifications and facilitate test reviews.
- Assist with early-stage Engineering Sampling (ES) and Customer Sampling (CS) activities as necessary.
- Coordinate with Product Engineers and Quality Assurance on Yield Management Systems and use cases to establish an enterprise-wide platform for yield enhancement and institutional product knowledge.
- Support and manage Sustaining Engineers in alignment with Elevate Semiconductor's strategic plans for test platform transitions and site-to-site qualifications.
- Develop a strategic plan for enhancing the local test environment and mentor junior employees on best practices.
- Actively cultivate a network of suppliers and contractors to support insourcing versus outsourcing workloads and future roadmap requirements.
- Ensure thorough documentation of critical processes and serve as the primary contact for ISO and customer audits.
Qualifications
- Bachelor's degree in Electrical Engineering (B.S.E.E.) with a minimum of 8 years of direct Test Engineering experience.
- Extensive experience in complex analog test development.
- Background in mixed-signal design, including ADC, DAC, and PLL.
- Proficiency in programming languages such as C, C++, VBT, and environments like Linux and Unix.
- General knowledge of Test Correlation, GRR, and NPI Flow.
- Ability to guide products from initial silicon to full production with minimal oversight.
- Experience with Test Program Version Control in SVN Repository or GIT.
- Familiarity with scripting languages like PERL and AWK for data log parsing and formatting.