Emulation Verification Engineer
1 week ago
At Apple, we're looking for a skilled Emulation Verification Engineer to join our Wireless SOC organization. As a key member of our team, you'll play a crucial role in preparing wireless SoCs for emulation build by adding suitable monitors/checkers and sanitizing with testcases in emulation TB.
Responsibilities:- Work closely with the emulation team to bring up large Wireless SoCs along with their mixed signal components in the emulation platform.
- Develop and utilize monitors/checkers on the emulation platform.
- Prepare and execute the test plan and perform reviews with cross-functional teams.
- Collaborate with Design, Architecture, Power, Silicon Validation, Performance, and SW Teams.
- Develop code for Design and verification that aids with emulation activities using Verilog/System Verilog/UVM.
- BSEE + 7 years of industry experience.
- Hands-on experience with bring up, debugging, and verification in Emulation.
- Proven design verification skills.
- Experience with System Verilog verification environments including C/C++ DPI, UVM.
- MSEE + 5 years of industry experience.
- Understanding of the tool flow from RTL to Emulation is a big plus.
- Experience in writing Synthesize-able SystemVerilog/Verilog code and SystemVerilog assertions.
- Good understanding of any Standard Emulator (Palladium, Veloce, Zebu) OR FPGA (Xilinx, Altera) flow.
- Experience on any Scripting (Perl/Python/TCL).
- Excellent analytical and debug skills.
- Experience in UVM Acceleration is plus.
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