SerDes Circuit Design Engineer

2 weeks ago

Cupertino, California, United States Apple Full time
Job Summary

We are seeking an experienced Analog Mixed-Signal designer to join our high-speed SerDes team at Apple. As a key member of our team, you will work closely with cross-functional teams to create state-of-the-art IPs for our world-leading system-on-chip (SOC) products.

Key Responsibilities
  • Design and develop high-performance and high-speed AMS circuits used in SerDes PHY, including evaluation of different circuit topologies for specific product requirements.
  • Collaborate with multi-functional teams to create and drive block-level specifications, mixed-signal implementations, and behavioral modeling.
  • Work closely with SOC teams to deliver IP views and ensure they meet quality standards.
  • Develop complex IPs on a regular basis and interact with peers/management to communicate progress, discuss new ideas, and drive new implementations/concepts.
Requirements
  • BSEE with 8+ years of proven experience.
  • Deep understanding of AMS design with experience in high-speed serial links.
  • Solid understanding of designing AMS circuit blocks, including Bandgap, biasing circuits, LDO regulators, amplifiers, comparators, switched-cap circuits, ADCs, DACs, Oscillators, Filters.
  • Understanding of analog mixed-signal concepts like mismatch mitigation, linearity, stability, low-power, and low-noise techniques.
  • Deep understanding and experience with digitally assisted analog design concepts (e.g., background calibrations, LMS-based adaptive loops).
  • Proven experience working on system and architecture teams to drive block-level and IP requirements.
  • Proven track record working with large teams and guiding junior engineers.
  • Experience with high-speed digital circuits (e.g., serializer, deserializer, counters, dividers, etc.) with solid understanding of digital design concepts.
  • Experience and proven understanding of Tx/Rx equalization techniques and circuits (e.g., CTLE, DFE, de-emphasis) for 20+ Gbps NRZ and PAM applications.
  • Experience with EQ adaptation methods and circuit interactions to improve PPA.
  • Solid understanding of CDR architectures and implementations.
  • Experience in Analog Mixed-Signal circuit modeling and performance evaluation (e.g., SystemVerilog, Matlab, Python, VerilogAMS).
  • Hands-on experience to drive lab testing, debug, and data analysis.
  • Hands-on experience in advanced CMOS technologies, design with FinFet technology.
  • Hands-on experience with AMS IC development from definition to high-volume production, including layout supervision, bench evaluation, correlation, and characterization.
Preferred Qualifications
  • Concepts of timing closure and related industry tools (e.g., Nanotime, Primetime).
  • Concepts of IP delivery and quality checks.
  • Knowledge of common high-speed SerDes protocols (e.g., PCIe, USB, DP, MPHY) is helpful.
  • Skills in scripting and automation to improve efficiency are highly desirable.
Additional Requirements

Apple is an Equal Opportunity Employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.

Apple benefit, compensation, and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

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