SerDes Circuit Design Engineer
2 weeks ago
We are seeking an experienced SerDes Circuit Design Engineer to join our team at Apple. As a key member of our high-speed SerDes team, you will be responsible for designing and developing high-performance analog mixed-signal circuits used in SerDes PHY.
Key Responsibilities:- Design and develop high-speed analog mixed-signal circuits for SerDes PHY
- Collaborate with cross-functional teams to create state-of-the-art IPs for Apple's products
- Work on designs that make the best systems and exceed the highest expectations of quality, innovation, and efficiency
- Develop and implement analog mixed-signal circuit blocks, including bandgap, biasing circuits, LDO regulators, amplifiers, comparators, switched-cap circuits, ADCs, DACs, oscillators, and filters
- Understand and apply analog mixed-signal concepts, such as mismatch mitigation, linearity, stability, low-power, and low-noise techniques
- Work with digitally assisted analog design concepts, including background calibrations and LMS-based adaptive loops
- Collaborate with system and architecture teams to drive block-level and IP requirements
- Guide junior engineers and work with large teams
- Experience with high-speed digital circuits, including serializers, deserializers, counters, dividers, and EQ adaptation methods
- Experience with CDR architectures and implementations
- Hands-on experience with AMS IC development, including layout supervision, bench evaluation, correlation, and characterization
- BSEE with 8+ years of proven experience
- Deep understanding of AMS design with experience in high-speed serial links
- Solid understanding of designing AMS circuit blocks, including bandgap, biasing circuits, LDO regulators, amplifiers, comparators, switched-cap circuits, ADCs, DACs, oscillators, and filters
- Understanding of analog mixed-signal concepts, such as mismatch mitigation, linearity, stability, low-power, and low-noise techniques
- Experience with digitally assisted analog design concepts, including background calibrations and LMS-based adaptive loops
- Collaboration with system and architecture teams to drive block-level and IP requirements
- Guiding junior engineers and working with large teams
- Experience with high-speed digital circuits, including serializers, deserializers, counters, dividers, and EQ adaptation methods
- Experience with CDR architectures and implementations
- Hands-on experience with AMS IC development, including layout supervision, bench evaluation, correlation, and characterization
- Experience with high-speed SerDes protocols, such as PCIe, USB, DP, and MPHY
- Skills in scripting and automation to improve efficiency
- Knowledge of common high-speed SerDes protocols
- Pay and benefits: base pay range between $175,800 and $312,200, and eligibility for discretionary bonuses or commission payments
- Comprehensive medical and dental coverage, retirement benefits, and a range of discounted products and free services
- Reimbursement for certain educational expenses, including tuition
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