Senior DDR IP Design Engineer

2 days ago

Redmond, Washington, United States SpaceX Full time
Job Title: Sr. DDR IP Design Engineer

At SpaceX, we're pushing the boundaries of innovation and technology to make humanity a multi-planetary species. As a Sr. DDR IP Design Engineer, you'll play a critical role in developing cutting-edge memory controller IP for our next-generation SoCs.

Responsibilities:
  • Own the high-quality release of the Memory Controller IP for SpaceX SoC designs, including triaging release/integration issues into IP defects and addressing issues.
  • Responsible for Memory Controller/PHY IP core development and integration.
  • Responsible for RTL design, synthesis, timing constraints, power estimation, and timing analysis using industry-leading CAD tools in the latest generation process technologies.
  • Collaborate with chip architects, software engineers, and other subsystem owners to develop high-performance Memory controller/PHY solutions.
  • Write detailed design specifications and test plans in close collaboration with architecture, package, and verification engineers.
  • Support silicon bring-up, performance, and power characterization for memory subsystems.
  • Drive functional verification, including test plan reviews, and functional and code coverage as well as timing closure for your designs.
Requirements:
  • BS in Electrical Engineering, Computer Engineering, or Computer Science.
  • 8+ years of experience working with ASICs and the VLSI design flow.
  • Experience in RTL development and verification using Verilog and/or SystemVerilog.
Preferred Skills and Experience:
  • MS or PhD in Electrical Engineering, Computer Engineering, or Computer Science.
  • Knowledge of DDR/LPDDR DRAM protocols and experience analyzing/debugging DDR interfaces and protocols.
  • Experience in the development of Memory Controller and PHY IPs.
  • Experience working with Memory IP, Error checking Code (ECC), and building scalable, efficient flows and processes.
  • Experience with designing state machines, data paths, arbitration, and clock domain crossing (CDC) logic.
  • Exposure to Design For Test (DFT), understanding of scan, and writing DFT-friendly RTL.
  • Experience developing or integrating IPs with AMBA AXI, ACE-Lite, and CHI interfaces.
  • Familiarity with Unified Power Format (UPF) for simulation and synthesis.
  • Programming skills in C, PERL/Python.
  • An eye for detail and ability to work with multi-functional teams to identify challenges and requirements and translate those into IP development items.
  • Great communication and interpersonal skills.
Additional Requirements:
  • Ability to work long hours and weekends as necessary to support critical milestones.
Compensation & Benefits:

Base salary is just one part of your total rewards package at SpaceX. You may also be eligible for long-term incentives, in the form of company stock, stock options, or long-term cash awards, as well as potential discretionary bonuses and the ability to purchase additional stock at a discount through an Employee Stock Purchase Plan.

You will also receive access to comprehensive medical, vision, and dental coverage, access to a 401(k) retirement plan, short & long-term disability insurance, life insurance, paid parental leave, and various other discounts and perks.

You may also accrue 3 weeks of paid vacation & will be eligible for 10 or more paid holidays per year.

Exempt employees are eligible for 5 days of sick leave per year.

Company shuttles are offered to employees for roundtrip travel from select Seattle locations to the SpaceX Redmond office Monday to Friday.

SpaceX is an Equal Opportunity Employer; employment with SpaceX is governed on the basis of merit, competence, and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability, or any other legally protected status.

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