Senior ASIC Timing Signoff and Front-End Implementation Engineer
1 week ago
At SpaceX, we're pushing the boundaries of space technology and innovation. We're seeking a highly skilled Senior ASIC Timing Signoff and Front-End Implementation Engineer to join our team.
About the Role:We're looking for a talented engineer to develop cutting-edge next-generation ASICs for deployment in space and ground infrastructures around the globe. As a Senior ASIC Timing Signoff and Front-End Implementation Engineer, you will be responsible for:
- Full chip and block level timing signoff and convergence through timing ecos on post routed database for various timing signoff checks
- Full chip and block level front-end implementation from timing constraints development, synthesis, formal verification, power intent generation & validation
- Develop block and full chip level timing constraints for test modes
- Timing closure ownership throughout the entire project cycle (RTL, synthesis, and physical implementation)
- Analysis of clock domain crossing paths at block and full chip level
- Work with mixed signal IP/PLL/SerDes/PHY teams to drive integration, timing, logical equivalence checking and analysis of various IPs into RTL
- Develop/modify/run RTL logic synthesis, formal verification, power intent verification and post synthesis timing validation flows
- Execute low power design and physical synthesis, deploying knowledge of unified power format and power intent verification
- Implement Functional ECOs for complex blocks
- Deploy and enhance methodology and flows related to timing constraint generation and verification and timing closure
- Work closely with chip architecture, design verification, physical design, DFT, and power teams to achieve tapeout success on designs - generally bridging the RTL and place and route
- Work with multi-disciplinary groups to make sure RTL/Netlists are on schedule and delivered with the highest quality by incorporating automated checks at every stage of the design process
- Bachelor's degree in electrical engineering, computer engineering or computer science
- 5+ years of experience working as a synthesis and/or front-end STA engineer
- Experience in ASIC multimode constraint generation, constraint partitioning and timing closure in advanced nodes
- Experience with test modes, mode merging to optimize physical design implementation and STA Signoff
- Experience with power intent and upf development for block and soc top
- Familiar with formal verification and implementing functional ecos
- Knowledge of deep sub-micron FinFET technology nodes (7nm and below) timing challenges, multi-corner and multimode timing closure, process variations (AOCV, POCV based STA), voltage drop aware STA, and clock reconvergence pessimism removal
- Hands-on experience in industry standard physical synthesis and STA tools (Synopsys DC, Primetime or equivalent)
- Experience with clock domain crossings, DFT/Scan/MBIST/LBIST and understanding of their impact on synthesis, physical design and timing closure
- Deep understanding of ASIC design flow, top-down and bottom-up design methodologies
- Knowledge of low-power methodologies and leakage/dynamic power optimization flows and techniques
- Familiar with implementation or integration of design blocks using Verilog/SystemVerilog
- Experience with high reliability design and implementations
- Excellent scripting skills (csh/bash, Perl, Python, TCL, Makefile etc.)
- Must be willing to travel when needed (typically)
- Willing to work extended hours and weekends to meet critical deadlines, as needed
Base salary is just one part of your total rewards package at SpaceX. You may also be eligible for long-term incentives, in the form of company stock, stock options, or long-term cash awards, as well as potential discretionary bonuses and the ability to purchase additional stock at a discount through an Employee Stock Purchase Plan.
You will also receive access to comprehensive medical, vision, and dental coverage, access to a 401(k) retirement plan, short & long-term disability insurance, life insurance, paid parental leave, and various other discounts and perks.
You may also accrue 3 weeks of paid vacation & will be eligible for 10 or more paid holidays per year.
Exempt employees are eligible for 5 days of sick leave per year.
SpaceX is an Equal Opportunity Employer; employment with SpaceX is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.
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