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Senior ASIC Timing Signoff and Front-End Implementation Engineer
2 months ago
At SpaceX, we're pushing the boundaries of space technology and exploring new frontiers. As a Senior ASIC Timing Signoff and Front-End Implementation Engineer, you'll play a critical role in developing cutting-edge ASICs for our Starlink network.
Responsibilities:- Develop and implement timing signoff and front-end implementation flows for ASICs
- Collaborate with cross-functional teams to ensure timely and successful tapeouts
- Design and develop low-power methodologies and leakage/dynamic power optimization flows
- Work with mixed-signal IP/PLL/SerDes/PHY teams to drive integration and timing analysis
- Develop and maintain RTL logic synthesis, formal verification, and power intent verification flows
- Bachelor's degree in Electrical Engineering, Computer Engineering, or Computer Science
- 5+ years of experience in ASIC design and implementation
- Experience with timing signoff and front-end implementation flows
- Knowledge of low-power methodologies and leakage/dynamic power optimization flows
- Experience with mixed-signal IP/PLL/SerDes/PHY teams
- Competitive salary and benefits package
- Opportunity to work on cutting-edge projects and technologies
- Collaborative and dynamic work environment
- Professional growth and development opportunities
SpaceX is an Equal Opportunity Employer and welcomes applications from diverse candidates. We are committed to creating an inclusive and respectful work environment that values diversity, equity, and inclusion.