Design Verification Engineer

2 weeks ago


Cupertino, California, United States Apple Full time
Design Verification Engineer

At Apple, we're pushing the boundaries of innovation and technology. As a Design Verification Engineer, you'll play a critical role in ensuring the quality and reliability of our Neural Engine, a cutting-edge hardware component that powers our devices.

Key Responsibilities
  • Develop comprehensive test plans and verification environments to validate the Neural Engine's functionality and performance.
  • Collaborate with design and architecture teams to understand the functional and performance goals of the design.
  • Triage and debug functional and performance issues with the Neural Engine.
  • Lead bug tracking and coverage convergence.
  • Stay up-to-date with design specs and conduct test plan reviews.
Requirements
  • Basic knowledge of computer architecture and digital design.
  • Knowledge of Verilog and Verilog simulators.
  • Knowledge of scripting languages such as Perl.
  • Experience with UVM or SystemVerilog for verification.
  • Experience with hardware acceleration or Silicon debug.
  • Experience with low-level programming of sophisticated computer systems in C/C++/assembly.
What We Offer

At Apple, we offer a competitive salary range of $175,800 to $312,200, depending on your skills and experience. You'll also have the opportunity to become an Apple shareholder through our discretionary employee stock programs. Additionally, you'll receive comprehensive medical and dental coverage, retirement benefits, and a range of discounted products and services.



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