Design Verification Engineer
6 days ago
We are seeking a highly skilled Design Verification Engineer to join our team at Apple, working on the development of the next generation of Apple's Neural Engine. As a key member of our Hardware Technology group, you will be responsible for ensuring the pre-silicon quality of our Neural Engine.
Key Responsibilities- Develop comprehensive test and coverage plans based on architecture specifications.
- Design and implement verification environments and tests using Object Oriented tools, particularly SystemVerilog and UVM.
- Collaborate with design and architecture teams to understand functional and performance goals of the design.
- Triage and debug functional and performance issues with the Neural Engine.
- Lead bug tracking and coverage convergence.
- Stay up-to-date with design specs and conduct test plan reviews.
- Develop block, subsystem, and full chip tests.
- Communicate effectively with the team and lead verification efforts in a specific area of the design.
- Basic knowledge of computer architecture and digital design.
- Knowledge of Verilog and Verilog simulators.
- Knowledge of scripting languages such as Perl.
- Experience with UVM or SystemVerilog for verification.
- Experience with hardware acceleration or Silicon debug.
- Experience with low-level programming of sophisticated computer systems in C/C++/assembly.
At Apple, we are committed to innovation and excellence in everything we do. We offer a comprehensive compensation package, including base pay, discretionary bonuses, and commission payments. Our benefits include comprehensive medical and dental coverage, retirement benefits, and a range of discounted products and free services. We are an equal opportunity employer and welcome applications from diverse candidates.
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