Senior ASIC/FPGA Design Engineer
3 days ago
Job Title: Senior ASIC/FPGA Design Engineer
Job Summary:
We are seeking a highly skilled Senior ASIC/FPGA Design Engineer to join our team at Bestinfo Systems LLC. The successful candidate will be responsible for designing and implementing high-speed crypto architectures on ASICs and FPGAs.
Key Responsibilities:
- Derive engineering specifications from system requirements and develop detailed architecture
- Execute design (RTL AND/OR HLS (C++ to RTL)) and RTL quality (RDC, CDC, Formal, Lint)
- Generate test plans
- Perform module level verification, synthesis/STA, Lab debug, SW driven validation on Linux based SOC evaluation boards
- Silicon/FPGA bring up, characterization and production ramp/support/collateral
Requirements:
- Bachelor's Degree in Electrical Engineering or related field
- 5+ years of experience in ASIC/FPGA design and development
- Proficient in VHDL and experience with high-level synthesis
- Strong knowledge of Ethernet, TCP/IP, and AXI protocols
- Active SECRET Clearance
Preferred Skills:
- Proficiency in C++ (OOP)
- Experience with Xilinx MPSOC design and writing/debugging with SDKs, BSPs on bare metal/PetaLinux OS
- Knowledge of PCIe, NVMe, and USB protocols
- Experience with High-Level Synthesis (Xilinx Vivado HLS, AND/OR Mentor Calypto)
What We Offer:
- Competitive salary and benefits package
- Opportunity to work on cutting-edge projects
- Collaborative and dynamic work environment
How to Apply:
Please submit your resume and cover letter to [insert contact information]. We look forward to hearing from you
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