ASIC Design Engineer
23 hours ago
Brookhaven National Laboratory is seeking a highly skilled ASIC Design Engineer - PDK/CAD Manager to join our team. As a key member of our ASIC design team, you will be responsible for building and maintaining the design infrastructure, providing tool support and training, and serving as the custodial of the process design kits (PDKs) and CAD/EAD tools.
Key Responsibilities- Build and maintain design environment to support operation of the ASIC development team at BNL through:
- Maintaining up-to-date organization of the pool of CAD/EDA ASIC design tools, PDKs, version-controlled repositories of design libraries, IP and outside-vendor libraries and their maintenance suitably for the current needs
- Working with the IT and security teams' Linux-based cluster and its configuration for installation and maintenance of CAD/EDA design tools from major vendors, such as Cadence, Mentor, Synopsis
- Integration of the designs in multi-user environment via process and design management tools, such as SOS Design Manager
- Organization of work directories, system shell scripts, tool scripts, physical and functional design verification decks, solutions for tools interoperability, procedures for efficient and secure organization of the design flows
- Set-up and maintenance of environments for Artificial Intelligence and Machine Learning modeling, simulations (such as PyTorch, TensorFlow and others) and integration with digital and mixed-mode IC design flows
- Set-up and maintenance of other ECAD tools supporting ASIC design efforts, such as physical-level device simulations, model extraction, calculus, and data presentation
- Interact with major vendors for providing optimized tools-set for the team; organize tools, process design kits, design techniques workshops and trainings, and introduction and monitoring of standardized design practices
- Participate in ASIC designs (analog, digital and mixed-mode, functional verification, etc.), upon qualifications and as necessary
- Bachelor's degree in an engineering discipline or closely related field of study
- Minimum three (3) years related work experience
- Familiarity with specificity of ASIC design processes and flows
- Familiarity with PDKs and CAD/EDA tools for ASIC design and their interoperability
- Knowledge of operating system shell scripting or other scripting languages, such as Pearl, Python, and others
- Knowledge of SKILL, Tcl/Tk, ASSURA and Calibre DRC/LVS verification decks syntax
- Master's degree in an engineering discipline or closely related field of study
- Ability to execute analog and/or digital ASIC design flows for performing design tasks
- Knowledge of back-end ASIC design elements, such as layout, physical verification, and design verification
- Ability to provide guidance in specific areas to the ASIC team
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